An interrupt to be sent to one or more Apic
s.
The vector and type of an Interrupt
.
Specifies the destination processors for an Interrupt
.
Identification information about the source of an IrqEvent
IrqChip implementation where the entire IrqChip is emulated by KVM.
The KvmSplitIrqsChip supports KVM’s SPLIT_IRQCHIP feature, where the PIC and IOAPIC
are emulated in userspace, while the local APICs are emulated in the kernel.
The SPLIT_IRQCHIP feature only supports x86/x86_64 so we only define this IrqChip in crosvm
for x86/x86_64.
Pending Apic
interrupts to be injected into a vcpu.
A container for x86 IrqRoutes, grouped by GSI.
An IrqChip
with all interrupt devices emulated in userspace. UserspaceIrqChip
works with
any hypervisor, but only supports x86.