Structs§
- Dropper 🔒Helper that implements
Drop
on behalf ofUserspaceIrqChip
. The many cloned copies of an irq chip share a single arc’edDropper
, which only runs its drop when the last irq chip copy is dropped. - Worker thread for polling timer events and sending them to an APIC.
- An
IrqChip
with all interrupt devices emulated in userspace.UserspaceIrqChip
works with any hypervisor, but only supports x86. - Waiter 🔒Condition variable used by
UserspaceIrqChip::wait_until_runnable
.
Enums§
Constants§
- PIT channel 0 timer is connected to IRQ 0
- CR0 cache disable bit
- CR0 extension type bit
- Default power on state of CR0 register, according to the Intel manual.
- CR0 not write through bit