Struct devices::CoIommuDev

pub struct CoIommuDev {

    config_regs: PciConfiguration,
    pci_address: Option<PciAddress>,
    mem: GuestMemory,
    coiommu_reg: CoIommuReg,
    endpoints: Vec<u16>,
    notifymap_mem: SafeDescriptor,
    notifymap_mmap: Arc<MemoryMapping>,
    notifymap_addr: Option<u64>,
    topologymap_mem: SafeDescriptor,
    topologymap_addr: Option<u64>,
    mmapped: bool,
    vm_memory_client: VmMemoryClient,
    pin_thread: Option<WorkerThread<PinWorker>>,
    unpin_thread: Option<WorkerThread<UnpinWorker>>,
    unpin_tube: Option<Tube>,
    ioevents: Vec<Event>,
    vfio_container: Arc<Mutex<VfioContainer>>,
    pinstate: Arc<Mutex<CoIommuPinState>>,
    params: CoIommuParameters,
}

Fields

config_regs: PciConfiguration

pci_address: Option<PciAddress>

mem: GuestMemory

coiommu_reg: CoIommuReg

endpoints: Vec<u16>

notifymap_mem: SafeDescriptor

notifymap_mmap: Arc<MemoryMapping>

notifymap_addr: Option<u64>

topologymap_mem: SafeDescriptor

topologymap_addr: Option<u64>

mmapped: bool

vm_memory_client: VmMemoryClient

pin_thread: Option<WorkerThread<PinWorker>>

unpin_thread: Option<WorkerThread<UnpinWorker>>

unpin_tube: Option<Tube>

ioevents: Vec<Event>

vfio_container: Arc<Mutex<VfioContainer>>

pinstate: Arc<Mutex<CoIommuPinState>>

params: CoIommuParameters

Implementations

impl CoIommuDev

pub fn new( mem: GuestMemory, vfio_container: Arc<Mutex<VfioContainer>>, vm_memory_client: VmMemoryClient, unpin_tube: Option<Tube>, endpoints: Vec<u16>, vcpu_count: u64, params: CoIommuParameters ) -> Result<Self>

fn register_mmap( &self, descriptor: SafeDescriptor, size: usize, offset: u64, gpa: u64, prot: Protection ) -> Result<()>

fn mmap(&mut self)

fn start_workers(&mut self)

fn start_pin_thread(&mut self)

fn start_unpin_thread(&mut self)

fn allocate_bar_address( &mut self, resources: &mut SystemAllocator, address: PciAddress, size: u64, bar_num: u8, name: &str ) -> Result<u64, Error>

fn read_mmio(&mut self, offset: u64, data: &mut [u8])

fn write_mmio(&mut self, offset: u64, data: &[u8])

Trait Implementations

impl PciDevice for CoIommuDev

fn debug_label(&self) -> String

Returns a label suitable for debug output.

fn allocate_address( &mut self, resources: &mut SystemAllocator ) -> Result<PciAddress, Error>

Allocate and return an unique bus, device and function number for this device. May be called multiple times; on subsequent calls, the device should return the same address it returned from the first call.

fn allocate_io_bars( &mut self, resources: &mut SystemAllocator ) -> Result<Vec<BarRange>, Error>

Allocates the needed IO BAR space using the allocate function which takes a size and returns an address. Returns a Vec of BarRange{addr, size, prefetchable}.

fn allocate_device_bars( &mut self, resources: &mut SystemAllocator ) -> Result<Vec<BarRange>, Error>

Allocates the needed device BAR space. Returns a Vec of BarRange{addr, size, prefetchable}. Unlike MMIO BARs (see allocate_io_bars), device BARs are not expected to incur VM exits

fn read_config_register(&self, reg_idx: usize) -> u32

Reads from a PCI configuration register.

fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8])

Writes to a PCI configuration register.

fn keep_rds(&self) -> Vec<RawDescriptor>

A vector of device-specific file descriptors that must be kept open after jailing. Must be called before the process is jailed.

fn read_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &mut [u8])

Reads from a BAR region mapped in to the device.

fn write_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &[u8])

Writes to a BAR region mapped in to the device.

fn get_bar_configuration(&self, bar_num: usize) -> Option<PciBarConfiguration>

Returns the configuration of a base address register, if present.

fn preferred_address(&self) -> Option<PciAddress>

Preferred PCI address for this device, if any.

fn preferred_irq(&self) -> PreferredIrq

Preferred IRQ for this device. The device may request a specific pin and IRQ number by returning a Fixed value. If a device does not support INTx# interrupts at all, it should return None. Otherwise, an appropriate IRQ will be allocated automatically. The device’s assign_irq function will be called with its assigned IRQ either way.

fn assign_irq( &mut self, _irq_evt: IrqLevelEvent, _pin: PciInterruptPin, _irq_num: u32 )

Assign a legacy PCI IRQ to this device. The device may write to irq_evt to trigger an interrupt. When irq_resample_evt is signaled, the device should re-assert irq_evt if necessary.

fn register_device_capabilities(&mut self) -> Result<(), Error>

Register any capabilties specified by the device.

fn get_vm_memory_client(&self) -> Option<&VmMemoryClient>

Gets a reference to the API client for sending VmMemoryRequest. Any devices that uses ioevents must provide this.

fn setup_pci_config_mapping( &mut self, _shmem: &SharedMemory, _base: usize, _len: usize ) -> Result<bool, Error>

Provides a memory region to back MMIO access to the configuration space. If the device can keep the memory region up to date, then it should return Ok(true), after which no more calls to read_config_register will be made. If support isn’t implemented, it should return Ok(false). Otherwise, it should return an error (a failure here is not treated as a fatal setup error).

fn read_virtual_config_register(&self, _reg_idx: usize) -> u32

Reads from a virtual config register.

fn write_virtual_config_register(&mut self, _reg_idx: usize, _value: u32)

Writes to a virtual config register.

fn on_device_sandboxed(&mut self)

Invoked when the device is sandboxed.

fn generate_acpi(&mut self, sdts: Vec<SDT>) -> Option<Vec<SDT>>

fn generate_acpi_methods(&mut self) -> (Vec<u8>, Option<(u32, MemoryMapping)>)

Construct customized acpi method, and return the AML code and shared memory

fn set_gpe(&mut self, _resources: &mut SystemAllocator) -> Option<u32>

fn destroy_device(&mut self)

Invoked when the device is destroyed

fn get_removed_children_devices(&self) -> Vec<PciAddress>

Get the removed children devices under pci bridge

fn get_new_pci_bus(&self) -> Option<Arc<Mutex<PciBus>>>

Get the pci bus generated by this pci device

fn configure_bridge_window( &mut self, _resources: &mut SystemAllocator, _bar_ranges: &[BarRange] ) -> Result<Vec<BarRange>, Error>

if device is a pci brdige, configure pci bridge window

fn set_subordinate_bus(&mut self, _bus_no: u8)

if device is a pci bridge, configure subordinate bus number

fn supports_iommu(&self) -> bool

Indicates whether the device supports IOMMU

fn set_iommu(&mut self, _iommu: IpcMemoryMapper) -> Result<()>

Sets the IOMMU for the device if supports_iommu()

fn as_virtio_pci_device(&self) -> Option<&VirtioPciDevice>

impl Suspendable for CoIommuDev

fn snapshot(&mut self) -> Result<Value>

Save the device state in an image that can be restored.

fn restore(&mut self, _data: Value) -> Result<()>

Load a saved snapshot of an image.

fn sleep(&mut self) -> Result<()>

Stop all threads related to the device. Sleep should be idempotent.

fn wake(&mut self) -> Result<()>

Create/Resume all threads related to the device. Wake should be idempotent.