Expand description
x86 architecture support.
Re-exportsΒ§
pub use cpuid::adjust_cpuid;pub use cpuid::CpuIdContext;
ModulesΒ§
- acpi
- bootparam
- bzimage π
- Loader for bzImage-format Linux kernels as described in https://www.kernel.org/doc/Documentation/x86/boot.txt
- cpuid
- fdt π
- gdb π
- x86 architecture gdb debugging support.
- gdt π
- interrupts
- mpspec π
- mptable
- msr_
index π - multiboot_
spec - Multiboot specification 0.6.96 definitions
- regs
- smbios
StructsΒ§
- Arch
Memory Layout - CpuId
Call - The wrapper for CPUID call functions.
- E820
Entry π - PciRootOSC π
- Setup
Data - A single entry to be inserted in the bootparam
setup_datalinked list. - Setup
Data Entries - Collection of SetupData entries to be inserted in the
bootparam
setup_datalinked list. - X8664arch
- setup_
data_ πhdr
EnumsΒ§
ConstantsΒ§
- ACPI_
HI_ πRSDP_ WINDOW_ BASE - BIOS_
MAX_ πSIZE - BOOT_
STACK_ POINTER - CMDLINE_
MAX_ πSIZE - CMDLINE_
OFFSET π - DEFAULT_
PCIE_ πCFG_ MMIO_ END - DEFAULT_
PCIE_ πCFG_ MMIO_ SIZE - DEFAULT_
PCIE_ πCFG_ MMIO_ START - DEFAULT_
PCI_ πMEM_ END - FIRST_
ADDR_ πPAST_ 32BITS - GB π
- HIGH_
MMIO_ πMAX_ END - KB π
- KERNEL_
32BIT_ ENTRY_ OFFSET - KERNEL_
64BIT_ ENTRY_ OFFSET - KERNEL_
START_ OFFSET - MB π
- MEM_
32BIT_ πGAP_ SIZE - MULTIBOOT_
INFO_ OFFSET - MULTIBOOT_
INFO_ SIZE - OSC_
STATUS_ πUNSUPPORT_ UUID - PCI_
HB_ πOSC_ CONTROL_ PCIE_ AER - PCI_
HB_ πOSC_ CONTROL_ PCIE_ CAP - PCI_
HB_ πOSC_ CONTROL_ PCIE_ HP - PCI_
HB_ πOSC_ CONTROL_ PCIE_ PME - PCI_
HB_ πOSC_ CONTROL_ SHPC_ HP - PROTECTED_
VM_ πFW_ MAX_ SIZE - PROTECTED_
VM_ πFW_ START - RESERVED_
MEM_ πSIZE - SETUP_
DATA_ πEND - SETUP_
DATA_ πSTART - SETUP_
DTB π - SETUP_
RNG_ πSEED - X86_
64_ πFDT_ MAX_ SIZE - X86_
64_ IRQ_ BASE - X86_
64_ SCI_ IRQ - X86_
64_ πSERIAL_ 1_ 3_ IRQ - X86_
64_ πSERIAL_ 2_ 4_ IRQ - ZERO_
PAGE_ OFFSET
FunctionsΒ§
- add_
e820_ πentry - Add an e820 region to the e820 map.
- append_
multiboot_ πinfo - arch_
memory_ regions - Returns a Vec of the valid memory addresses. These should be used to configure the GuestMemory structure for the platform. For x86_64 all addresses are valid from the start of the kernel except a carve out at the end of 32bit address space.
- bios_
start π - The x86 reset vector for i386+ and x86_64 puts the processor into an βunreal modeβ where it can access the last 1 MB of the 32-bit address space in 16-bit mode, and starts the instruction pointer at the effective physical address 0xFFFF_FFF0.
- check_
host_ hybrid_ support - Check if host supports hybrid CPU feature. The check include: 1. Check if CPUID.1AH exists. CPUID.1AH is hybrid information enumeration leaf. 2. Check if CPUID.07H.00H:EDX[bit 15] sets. This bit means the processor is identified as a hybrid part. 3. Check if CPUID.1AH:EAX sets. The hybrid core type is set in EAX.
- configure_
boot_ πparams - configure_
multiboot_ πinfo - create_
arch_ memory_ layout - find_
setup_ πdata - Find the first
setup_data_hdrwith the given type in guest memory and return its address. - generate_
e820_ πmemory_ map - Generate a memory map in INT 0x15 AX=0xE820 format.
- get_
cpu_ manufacturer - identity_
map_ πaddr_ start - setup_
data_ πrng_ seed - Generate a SETUP_RNG_SEED SetupData with random seed data.
- tss_
addr_ πend - tss_
addr_ πstart - write_
setup_ πdata - Write setup_data entries in guest memory and link them together with the
nextfield.