Module x86_64::msr_index

Constants

• ATM_LNC_C6_AUTO_DEMOTE
• DEBUGCTLMSR_BTF
• DEBUGCTLMSR_BTINT
• DEBUGCTLMSR_BTS
• DEBUGCTLMSR_BTS_OFF_OS
• DEBUGCTLMSR_BTS_OFF_USR
• DEBUGCTLMSR_FREEZE_LBRS_ON_PMI
• DEBUGCTLMSR_LBR
• DEBUGCTLMSR_TR
• EFER_FFXSR
• EFER_LMA
• EFER_LME
• EFER_LMSLE
• EFER_NX
• EFER_SCE
• EFER_SVME
• ENERGY_PERF_BIAS_NORMAL
• ENERGY_PERF_BIAS_PERFORMANCE
• ENERGY_PERF_BIAS_POWERSAVE
• FAM10H_MMIO_CONF_BASE_MASK
• FAM10H_MMIO_CONF_BASE_SHIFT
• FAM10H_MMIO_CONF_BUSRANGE_MASK
• FAM10H_MMIO_CONF_BUSRANGE_SHIFT
• FAM10H_MMIO_CONF_ENABLE
• FEATURE_CONTROL_LMCE
• FEATURE_CONTROL_LOCKED
• FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX
• FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX
• HWP_ACTIVITY_WINDOW_BIT
• HWP_BASE_BIT
• HWP_ENERGY_PERF_PREFERENCE_BIT
• HWP_NOTIFICATIONS_BIT
• HWP_PACKAGE_LEVEL_REQUEST_BIT
• INTEL_PERF_CTL_MASK
• K8_INTP_C1E_ACTIVE_MASK
• K8_MTRRFIXRANGE_DRAM_ENABLE
• K8_MTRRFIXRANGE_DRAM_MODIFY
• K8_MTRR_RDMEM_WRMEM_MASK
• LBR_INFO_CYCLES
• MSR_AMD64_BU_CFG2
• MSR_AMD64_DC_CFG
• MSR_AMD64_IBSBRTARGET
• MSR_AMD64_IBSCTL
• MSR_AMD64_IBSDCLINAD
• MSR_AMD64_IBSDCPHYSAD
• MSR_AMD64_IBSFETCHCTL
• MSR_AMD64_IBSFETCHLINAD
• MSR_AMD64_IBSFETCHPHYSAD
• MSR_AMD64_IBSFETCH_REG_COUNT
• MSR_AMD64_IBSFETCH_REG_MASK
• MSR_AMD64_IBSOPCTL
• MSR_AMD64_IBSOPDATA
• MSR_AMD64_IBSOPDATA2
• MSR_AMD64_IBSOPDATA3
• MSR_AMD64_IBSOPDATA4
• MSR_AMD64_IBSOPRIP
• MSR_AMD64_IBSOP_REG_COUNT
• MSR_AMD64_IBSOP_REG_MASK
• MSR_AMD64_IBS_REG_COUNT_MAX
• MSR_AMD64_LS_CFG
• MSR_AMD64_MC0_MASK
• MSR_AMD64_NB_CFG
• MSR_AMD64_OSVW_ID_LENGTH
• MSR_AMD64_OSVW_STATUS
• MSR_AMD64_PATCH_LEVEL
• MSR_AMD64_PATCH_LOADER
• MSR_AMD64_TSC_RATIO
• MSR_AMD_PERF_CTL
• MSR_AMD_PERF_STATUS
• MSR_AMD_PSTATE_DEF_BASE
• MSR_ATOM_CORE_RATIOS
• MSR_ATOM_CORE_TURBO_RATIOS
• MSR_ATOM_CORE_TURBO_VIDS
• MSR_ATOM_CORE_VIDS
• MSR_ATOM_PKG_C6_RESIDENCY
• MSR_CC6_DEMOTION_POLICY_CONFIG
• MSR_CONFIG_TDP_CONTROL
• MSR_CONFIG_TDP_LEVEL_1
• MSR_CONFIG_TDP_LEVEL_2
• MSR_CONFIG_TDP_NOMINAL
• MSR_CORE_C1_RES
• MSR_CORE_C3_RESIDENCY
• MSR_CORE_C6_RESIDENCY
• MSR_CORE_C7_RESIDENCY
• MSR_CORE_PERF_FIXED_CTR0
• MSR_CORE_PERF_FIXED_CTR1
• MSR_CORE_PERF_FIXED_CTR2
• MSR_CORE_PERF_FIXED_CTR_CTRL
• MSR_CORE_PERF_GLOBAL_CTRL
• MSR_CORE_PERF_GLOBAL_OVF_CTRL
• MSR_CORE_PERF_GLOBAL_STATUS
• MSR_CORE_PERF_LIMIT_REASONS
• MSR_CSTAR
• MSR_DRAM_ENERGY_STATUS
• MSR_DRAM_PERF_STATUS
• MSR_DRAM_POWER_INFO
• MSR_DRAM_POWER_LIMIT
• MSR_EBC_FREQUENCY_ID
• MSR_EFER
• MSR_F15H_IC_CFG
• MSR_F15H_NB_PERF_CTL
• MSR_F15H_NB_PERF_CTR
• MSR_F15H_PERF_CTL
• MSR_F15H_PERF_CTR
• MSR_F15H_PTSC
• MSR_F16H_DR0_ADDR_MASK
• MSR_F16H_DR1_ADDR_MASK
• MSR_F16H_DR2_ADDR_MASK
• MSR_F16H_DR3_ADDR_MASK
• MSR_F16H_L2I_PERF_CTL
• MSR_F16H_L2I_PERF_CTR
• MSR_F17H_IRPERF
• MSR_FAM10H_MMIO_CONF_BASE
• MSR_FAM10H_NODE_ID
• MSR_FSB_FREQ
• MSR_FS_BASE
• MSR_GEODE_BUSCONT_CONF0
• MSR_GFX_PERF_LIMIT_REASONS
• MSR_GS_BASE
• MSR_HWP_CAPABILITIES
• MSR_HWP_INTERRUPT
• MSR_HWP_REQUEST
• MSR_HWP_REQUEST_PKG
• MSR_HWP_STATUS
• MSR_IA32_APERF
• MSR_IA32_APICBASE
• MSR_IA32_APICBASE_BASE
• MSR_IA32_APICBASE_BSP
• MSR_IA32_APICBASE_ENABLE
• MSR_IA32_BBL_CR_CTL
• MSR_IA32_BBL_CR_CTL3
• MSR_IA32_BNDCFGS
• MSR_IA32_CR_PAT
• MSR_IA32_DEBUGCTLMSR
• MSR_IA32_DS_AREA
• MSR_IA32_EBL_CR_POWERON
• MSR_IA32_ENERGY_PERF_BIAS
• MSR_IA32_FEATURE_CONTROL
• MSR_IA32_LASTBRANCHFROMIP
• MSR_IA32_LASTBRANCHTOIP
• MSR_IA32_LASTINTFROMIP
• MSR_IA32_LASTINTTOIP
• MSR_IA32_MC0_ADDR
• MSR_IA32_MC0_CTL
• MSR_IA32_MC0_CTL2
• MSR_IA32_MC0_MISC
• MSR_IA32_MC0_STATUS
• MSR_IA32_MCG_CAP
• MSR_IA32_MCG_CTL
• MSR_IA32_MCG_EAX
• MSR_IA32_MCG_EBP
• MSR_IA32_MCG_EBX
• MSR_IA32_MCG_ECX
• MSR_IA32_MCG_EDI
• MSR_IA32_MCG_EDX
• MSR_IA32_MCG_EFLAGS
• MSR_IA32_MCG_EIP
• MSR_IA32_MCG_ESI
• MSR_IA32_MCG_ESP
• MSR_IA32_MCG_EXT_CTL
• MSR_IA32_MCG_RESERVED
• MSR_IA32_MCG_STATUS
• MSR_IA32_MISC_ENABLE
• MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE
• MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
• MSR_IA32_MISC_ENABLE_BTS_UNAVAIL_BIT
• MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE
• MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_EMON
• MSR_IA32_MISC_ENABLE_EMON_BIT
• MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP
• MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP_BIT
• MSR_IA32_MISC_ENABLE_FAST_STRING
• MSR_IA32_MISC_ENABLE_FAST_STRING_BIT
• MSR_IA32_MISC_ENABLE_FERR
• MSR_IA32_MISC_ENABLE_FERR_BIT
• MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX
• MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX_BIT
• MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE
• MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_L1D_CONTEXT
• MSR_IA32_MISC_ENABLE_L1D_CONTEXT_BIT
• MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE
• MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_LIMIT_CPUID
• MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT
• MSR_IA32_MISC_ENABLE_MWAIT
• MSR_IA32_MISC_ENABLE_MWAIT_BIT
• MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL
• MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL_BIT
• MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE
• MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK
• MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK_BIT
• MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE
• MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK
• MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK_BIT
• MSR_IA32_MISC_ENABLE_TCC
• MSR_IA32_MISC_ENABLE_TCC_BIT
• MSR_IA32_MISC_ENABLE_TM1
• MSR_IA32_MISC_ENABLE_TM1_BIT
• MSR_IA32_MISC_ENABLE_TM2
• MSR_IA32_MISC_ENABLE_TM2_BIT
• MSR_IA32_MISC_ENABLE_TURBO_DISABLE
• MSR_IA32_MISC_ENABLE_TURBO_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_X87_COMPAT
• MSR_IA32_MISC_ENABLE_X87_COMPAT_BIT
• MSR_IA32_MISC_ENABLE_XD_DISABLE
• MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT
• MSR_IA32_MISC_ENABLE_XTPR_DISABLE
• MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT
• MSR_IA32_MPERF
• MSR_IA32_P5_MC_ADDR
• MSR_IA32_P5_MC_TYPE
• MSR_IA32_PACKAGE_THERM_INTERRUPT
• MSR_IA32_PACKAGE_THERM_STATUS
• MSR_IA32_PEBS_ENABLE
• MSR_IA32_PERFCTR0
• MSR_IA32_PERFCTR1
• MSR_IA32_PERF_CAPABILITIES
• MSR_IA32_PERF_CTL
• MSR_IA32_PERF_STATUS
• MSR_IA32_PLATFORM_ID
• MSR_IA32_PMC0
• MSR_IA32_POWER_CTL
• MSR_IA32_RTIT_ADDR0_A
• MSR_IA32_RTIT_ADDR0_B
• MSR_IA32_RTIT_ADDR1_A
• MSR_IA32_RTIT_ADDR1_B
• MSR_IA32_RTIT_ADDR2_A
• MSR_IA32_RTIT_ADDR2_B
• MSR_IA32_RTIT_ADDR3_A
• MSR_IA32_RTIT_ADDR3_B
• MSR_IA32_RTIT_CR3_MATCH
• MSR_IA32_RTIT_CTL
• MSR_IA32_RTIT_OUTPUT_BASE
• MSR_IA32_RTIT_OUTPUT_MASK
• MSR_IA32_RTIT_STATUS
• MSR_IA32_SMBASE
• MSR_IA32_SMM_MONITOR_CTL
• MSR_IA32_SYSENTER_CS
• MSR_IA32_SYSENTER_EIP
• MSR_IA32_SYSENTER_ESP
• MSR_IA32_TEMPERATURE_TARGET
• MSR_IA32_THERM_CONTROL
• MSR_IA32_THERM_INTERRUPT
• MSR_IA32_THERM_STATUS
• MSR_IA32_TSC
• MSR_IA32_TSCDEADLINE
• MSR_IA32_TSC_ADJUST
• MSR_IA32_TSC_DEADLINE
• MSR_IA32_UCODE_REV
• MSR_IA32_UCODE_WRITE
• MSR_IA32_VMX_BASIC
• MSR_IA32_VMX_CR0_FIXED0
• MSR_IA32_VMX_CR0_FIXED1
• MSR_IA32_VMX_CR4_FIXED0
• MSR_IA32_VMX_CR4_FIXED1
• MSR_IA32_VMX_ENTRY_CTLS
• MSR_IA32_VMX_EPT_VPID_CAP
• MSR_IA32_VMX_EXIT_CTLS
• MSR_IA32_VMX_MISC
• MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE
• MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS
• MSR_IA32_VMX_PINBASED_CTLS
• MSR_IA32_VMX_PROCBASED_CTLS
• MSR_IA32_VMX_PROCBASED_CTLS2
• MSR_IA32_VMX_TRUE_ENTRY_CTLS
• MSR_IA32_VMX_TRUE_EXIT_CTLS
• MSR_IA32_VMX_TRUE_PINBASED_CTLS
• MSR_IA32_VMX_TRUE_PROCBASED_CTLS
• MSR_IA32_VMX_VMCS_ENUM
• MSR_IA32_VMX_VMFUNC
• MSR_IA32_XSS
• MSR_IDT_FCR1
• MSR_IDT_FCR2
• MSR_IDT_FCR3
• MSR_IDT_FCR4
• MSR_IDT_MCR0
• MSR_IDT_MCR1
• MSR_IDT_MCR2
• MSR_IDT_MCR3
• MSR_IDT_MCR4
• MSR_IDT_MCR5
• MSR_IDT_MCR6
• MSR_IDT_MCR7
• MSR_IDT_MCR_CTRL
• MSR_K6_EPMR
• MSR_K6_PFIR
• MSR_K6_PSOR
• MSR_K6_UWCCR
• MSR_K6_WHCR
• MSR_K7_CLK_CTL
• MSR_K7_EVNTSEL0
• MSR_K7_EVNTSEL1
• MSR_K7_EVNTSEL2
• MSR_K7_EVNTSEL3
• MSR_K7_FID_VID_CTL
• MSR_K7_FID_VID_STATUS
• MSR_K7_HWCR
• MSR_K7_PERFCTR0
• MSR_K7_PERFCTR1
• MSR_K7_PERFCTR2
• MSR_K7_PERFCTR3
• MSR_K8_INT_PENDING_MSG
• MSR_K8_SYSCFG
• MSR_K8_TOP_MEM1
• MSR_K8_TOP_MEM2
• MSR_K8_TSEG_ADDR
• MSR_K8_TSEG_MASK
• MSR_KERNEL_GS_BASE
• MSR_KNC_EVNTSEL0
• MSR_KNC_EVNTSEL1
• MSR_KNC_PERFCTR0
• MSR_KNC_PERFCTR1
• MSR_KNL_CORE_C6_RESIDENCY
• MSR_LBR_CORE_FROM
• MSR_LBR_CORE_TO
• MSR_LBR_INFO_0
• MSR_LBR_NHM_FROM
• MSR_LBR_NHM_TO
• MSR_LBR_SELECT
• MSR_LBR_TOS
• MSR_LSTAR
• MSR_MC6_DEMOTION_POLICY_CONFIG
• MSR_MISC_FEATURE_CONTROL
• MSR_MISC_FEATURE_ENABLES
• MSR_MISC_FEATURE_ENABLES_RING3MWAIT_BIT
• MSR_MISC_PWR_MGMT
• MSR_MODULE_C6_RES_MS
• MSR_MTRRcap
• MSR_MTRRdefType
• MSR_MTRRfix4K_C0000
• MSR_MTRRfix4K_C8000
• MSR_MTRRfix4K_D0000
• MSR_MTRRfix4K_D8000
• MSR_MTRRfix4K_E0000
• MSR_MTRRfix4K_E8000
• MSR_MTRRfix4K_F0000
• MSR_MTRRfix4K_F8000
• MSR_MTRRfix16K_80000
• MSR_MTRRfix16K_A0000
• MSR_MTRRfix64K_00000
• MSR_OFFCORE_RSP_0
• MSR_OFFCORE_RSP_1
• MSR_P4_ALF_ESCR0
• MSR_P4_ALF_ESCR1
• MSR_P4_BPU_CCCR0
• MSR_P4_BPU_CCCR1
• MSR_P4_BPU_CCCR2
• MSR_P4_BPU_CCCR3
• MSR_P4_BPU_ESCR0
• MSR_P4_BPU_ESCR1
• MSR_P4_BPU_PERFCTR0
• MSR_P4_BPU_PERFCTR1
• MSR_P4_BPU_PERFCTR2
• MSR_P4_BPU_PERFCTR3
• MSR_P4_BSU_ESCR0
• MSR_P4_BSU_ESCR1
• MSR_P4_CRU_ESCR0
• MSR_P4_CRU_ESCR1
• MSR_P4_CRU_ESCR2
• MSR_P4_CRU_ESCR3
• MSR_P4_CRU_ESCR4
• MSR_P4_CRU_ESCR5
• MSR_P4_DAC_ESCR0
• MSR_P4_DAC_ESCR1
• MSR_P4_FIRM_ESCR0
• MSR_P4_FIRM_ESCR1
• MSR_P4_FLAME_CCCR0
• MSR_P4_FLAME_CCCR1
• MSR_P4_FLAME_CCCR2
• MSR_P4_FLAME_CCCR3
• MSR_P4_FLAME_ESCR0
• MSR_P4_FLAME_ESCR1
• MSR_P4_FLAME_PERFCTR0
• MSR_P4_FLAME_PERFCTR1
• MSR_P4_FLAME_PERFCTR2
• MSR_P4_FLAME_PERFCTR3
• MSR_P4_FSB_ESCR0
• MSR_P4_FSB_ESCR1
• MSR_P4_IQ_CCCR0
• MSR_P4_IQ_CCCR1
• MSR_P4_IQ_CCCR2
• MSR_P4_IQ_CCCR3
• MSR_P4_IQ_CCCR4
• MSR_P4_IQ_CCCR5
• MSR_P4_IQ_ESCR0
• MSR_P4_IQ_ESCR1
• MSR_P4_IQ_PERFCTR0
• MSR_P4_IQ_PERFCTR1
• MSR_P4_IQ_PERFCTR2
• MSR_P4_IQ_PERFCTR3
• MSR_P4_IQ_PERFCTR4
• MSR_P4_IQ_PERFCTR5
• MSR_P4_IS_ESCR0
• MSR_P4_IS_ESCR1
• MSR_P4_ITLB_ESCR0
• MSR_P4_ITLB_ESCR1
• MSR_P4_IX_ESCR0
• MSR_P4_IX_ESCR1
• MSR_P4_MOB_ESCR0
• MSR_P4_MOB_ESCR1
• MSR_P4_MS_CCCR0
• MSR_P4_MS_CCCR1
• MSR_P4_MS_CCCR2
• MSR_P4_MS_CCCR3
• MSR_P4_MS_ESCR0
• MSR_P4_MS_ESCR1
• MSR_P4_MS_PERFCTR0
• MSR_P4_MS_PERFCTR1
• MSR_P4_MS_PERFCTR2
• MSR_P4_MS_PERFCTR3
• MSR_P4_PEBS_MATRIX_VERT
• MSR_P4_PMH_ESCR0
• MSR_P4_PMH_ESCR1
• MSR_P4_RAT_ESCR0
• MSR_P4_RAT_ESCR1
• MSR_P4_SAAT_ESCR0
• MSR_P4_SAAT_ESCR1
• MSR_P4_SSU_ESCR0
• MSR_P4_SSU_ESCR1
• MSR_P4_TBPU_ESCR0
• MSR_P4_TBPU_ESCR1
• MSR_P4_TC_ESCR0
• MSR_P4_TC_ESCR1
• MSR_P4_U2L_ESCR0
• MSR_P4_U2L_ESCR1
• MSR_P6_EVNTSEL0
• MSR_P6_EVNTSEL1
• MSR_P6_PERFCTR0
• MSR_P6_PERFCTR1
• MSR_PEBS_FRONTEND
• MSR_PEBS_LD_LAT_THRESHOLD
• MSR_PERF_LIMIT_REASONS
• MSR_PKGC3_IRTL
• MSR_PKGC6_IRTL
• MSR_PKGC7_IRTL
• MSR_PKGC8_IRTL
• MSR_PKGC9_IRTL
• MSR_PKGC10_IRTL
• MSR_PKG_ANY_CORE_C0_RES
• MSR_PKG_ANY_GFXE_C0_RES
• MSR_PKG_BOTH_CORE_GFXE_C0_RES
• MSR_PKG_C2_RESIDENCY
• MSR_PKG_C3_RESIDENCY
• MSR_PKG_C6_RESIDENCY
• MSR_PKG_C7_RESIDENCY
• MSR_PKG_C8_RESIDENCY
• MSR_PKG_C9_RESIDENCY
• MSR_PKG_C10_RESIDENCY
• MSR_PKG_CST_CONFIG_CONTROL
• MSR_PKG_ENERGY_STATUS
• MSR_PKG_PERF_STATUS
• MSR_PKG_POWER_INFO
• MSR_PKG_POWER_LIMIT
• MSR_PKG_WEIGHTED_CORE_C0_RES
• MSR_PLATFORM_ENERGY_STATUS
• MSR_PLATFORM_INFO
• MSR_PM_ENABLE
• MSR_PP0_ENERGY_STATUS
• MSR_PP0_PERF_STATUS
• MSR_PP0_POLICY
• MSR_PP0_POWER_LIMIT
• MSR_PP1_ENERGY_STATUS
• MSR_PP1_POLICY
• MSR_PP1_POWER_LIMIT
• MSR_PPERF
• MSR_PPIN
• MSR_PPIN_CTL
• MSR_RAPL_POWER_UNIT
• MSR_RING_PERF_LIMIT_REASONS
• MSR_SMI_COUNT
• MSR_STAR
• MSR_SYSCALL_MASK
• MSR_THERM2_CTL
• MSR_THERM2_CTL_TM_SELECT
• MSR_TMTA_LONGRUN_CTRL
• MSR_TMTA_LONGRUN_FLAGS
• MSR_TMTA_LRTI_READOUT
• MSR_TMTA_LRTI_VOLT_MHZ
• MSR_TSC_AUX
• MSR_TURBO_ACTIVATION_RATIO
• MSR_TURBO_RATIO_LIMIT
• MSR_TURBO_RATIO_LIMIT1
• MSR_TURBO_RATIO_LIMIT2
• MSR_VIA_BCR2
• MSR_VIA_FCR
• MSR_VIA_LONGHAUL
• MSR_VIA_RNG
• MSR_VM_CR
• MSR_VM_HSAVE_PA
• MSR_VM_IGNNE
• NHM_C1_AUTO_DEMOTE
• NHM_C3_AUTO_DEMOTE
• PACKAGE_THERM_INT_HIGH_ENABLE
• PACKAGE_THERM_INT_LOW_ENABLE
• PACKAGE_THERM_INT_PLN_ENABLE
• PACKAGE_THERM_STATUS_POWER_LIMIT
• PACKAGE_THERM_STATUS_PROCHOT
• SNB_C1_AUTO_UNDEMOTE
• SNB_C3_AUTO_UNDEMOTE
• THERM_INT_HIGH_ENABLE
• THERM_INT_LOW_ENABLE
• THERM_INT_PLN_ENABLE
• THERM_INT_THRESHOLD0_ENABLE
• THERM_INT_THRESHOLD1_ENABLE
• THERM_LOG_THRESHOLD0
• THERM_LOG_THRESHOLD1
• THERM_MASK_THRESHOLD0
• THERM_MASK_THRESHOLD1
• THERM_SHIFT_THRESHOLD0
• THERM_SHIFT_THRESHOLD1
• THERM_STATUS_POWER_LIMIT
• THERM_STATUS_PROCHOT
• THERM_STATUS_THRESHOLD0
• THERM_STATUS_THRESHOLD1
• VMX_BASIC_64
• VMX_BASIC_INOUT
• VMX_BASIC_MEM_TYPE_MASK
• VMX_BASIC_MEM_TYPE_SHIFT
• VMX_BASIC_MEM_TYPE_WB
• VMX_BASIC_TRUE_CTLS
• VMX_BASIC_VMCS_SIZE_SHIFT
• _EFER_FFXSR
• _EFER_LMA
• _EFER_LME
• _EFER_LMSLE
• _EFER_NX
• _EFER_SCE
• _EFER_SVME