List of all items
Structs
- ArchMemoryLayout
- CpuIdCall
- E820Entry
- PciRootOSC
- SetupData
- X8664arch
- acpi::AcpiDevResource
- acpi::GenericAddress
- acpi::Ioapic
- acpi::IoapicInterruptSourceOverride
- acpi::LocalApic
- acpi::Localx2Apic
- bootparam::__IncompleteArrayField
- bootparam::apm_bios_info
- bootparam::boot_e820_entry
- bootparam::boot_params
- bootparam::edd_device_params
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_1
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_2
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_3
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_4
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_5
- bootparam::edd_device_params__bindgen_ty_1__bindgen_ty_6
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_1
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_10
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_2
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_3
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_4
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_5
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_6
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_7
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_8
- bootparam::edd_device_params__bindgen_ty_2__bindgen_ty_9
- bootparam::edd_info
- bootparam::edid_info
- bootparam::efi_info
- bootparam::ist_info
- bootparam::olpc_ofw_header
- bootparam::screen_info
- bootparam::setup_data
- bootparam::setup_header
- bootparam::sys_desc_table
- cpuid::CpuIdContext
- mpspec::mpc_bus
- mpspec::mpc_cpu
- mpspec::mpc_intsrc
- mpspec::mpc_ioapic
- mpspec::mpc_lintsrc
- mpspec::mpc_oemtable
- mpspec::mpc_table
- mpspec::mpf_intel
- setup_data_hdr
- smbios::Smbios23Entrypoint
- smbios::Smbios23Intermediate
- smbios::Smbios30Entrypoint
- smbios::SmbiosBiosInfo
- smbios::SmbiosEndOfTable
- smbios::SmbiosOemStrings
- smbios::SmbiosSysInfo
Enums
- CpuManufacturer
- CpuMode
- E820Type
- Error
- HybridSupportError
- KernelType
- MsrError
- SetupDataType
- bzimage::Error
- cpuid::Error
- interrupts::Error
- mptable::Error
- regs::Error
- smbios::Error
Unions
Functions
- acpi::create_acpi_tables
- acpi::create_customize_ssdt
- acpi::create_dsdt_table
- acpi::create_facp_table
- acpi::next_offset
- acpi::sync_acpi_id_from_cpuid
- acpi::write_facp_overrides
- add_e820_entry
- arch_memory_regions
- bios_start
- bzimage::load_bzimage
- check_host_hybrid_support
- configure_system
- cpuid::adjust_cpuid
- cpuid::cpu_manufacturer
- cpuid::filter_cpuid
- cpuid::setup_cpuid
- create_arch_memory_layout
- fdt::create_fdt
- gdb::phys_addr
- gdt::gdt_entry
- gdt::get_avl
- gdt::get_base
- gdt::get_db
- gdt::get_dpl
- gdt::get_g
- gdt::get_l
- gdt::get_limit
- gdt::get_p
- gdt::get_s
- gdt::get_type
- gdt::segment_from_gdt
- generate_e820_memory_map
- get_cpu_manufacturer
- identity_map_addr_start
- interrupts::lapic_byte_offset_to_register
- interrupts::set_apic_delivery_mode
- interrupts::set_lint
- max_ram_end_before_32bit
- mptable::compute_checksum
- mptable::compute_mp_size
- mptable::mpf_intel_compute_checksum
- mptable::setup_mptable
- regs::configure_segments_and_sregs
- regs::configure_segments_and_sregs_flat32
- regs::count_variable_mtrrs
- regs::get_max_len
- regs::get_mtrr_pairs
- regs::get_power_of_two
- regs::is_mtrr_msr
- regs::set_default_msrs
- regs::set_long_mode_msrs
- regs::set_mtrr_msrs
- regs::setup_page_tables
- regs::vcpu_supported_variable_mtrrs
- regs::write_gdt_table
- regs::write_idt_value
- setup_data_rng_seed
- smbios::compute_checksum
- smbios::setup_smbios
- smbios::write_and_incr
- smbios::write_string
- tss_addr_end
- tss_addr_start
- write_setup_data
Type Aliases
- Result
- bootparam::__u16
- bootparam::__u32
- bootparam::__u64
- bootparam::__u8
- bzimage::Result
- cpuid::Result
- interrupts::Result
- mpspec::mp_bustype
- mpspec::mp_irq_source_types
- mptable::Result
- regs::Result
- smbios::Result
Constants
- ACPI_HI_RSDP_WINDOW_BASE
- BIOS_MAX_SIZE
- BOOT_STACK_POINTER
- CMDLINE_MAX_SIZE
- CMDLINE_OFFSET
- DEFAULT_PCIE_CFG_MMIO_END
- DEFAULT_PCIE_CFG_MMIO_SIZE
- DEFAULT_PCIE_CFG_MMIO_START
- DEFAULT_PCI_MEM_END
- END_ADDR_BEFORE_32BITS
- FIRST_ADDR_PAST_20BITS
- FIRST_ADDR_PAST_32BITS
- GB
- HIGH_MMIO_MAX_END
- KERNEL_32BIT_ENTRY_OFFSET
- KERNEL_64BIT_ENTRY_OFFSET
- KERNEL_START_OFFSET
- MB
- MEM_32BIT_GAP_SIZE
- OSC_STATUS_UNSUPPORT_UUID
- PCI_HB_OSC_CONTROL_PCIE_AER
- PCI_HB_OSC_CONTROL_PCIE_CAP
- PCI_HB_OSC_CONTROL_PCIE_HP
- PCI_HB_OSC_CONTROL_PCIE_PME
- PCI_HB_OSC_CONTROL_SHPC_HP
- PROTECTED_VM_FW_MAX_SIZE
- PROTECTED_VM_FW_START
- RESERVED_MEM_SIZE
- SETUP_DATA_END
- SETUP_DATA_START
- SETUP_DTB
- SETUP_RNG_SEED
- X86_64_IRQ_BASE
- X86_64_SCI_IRQ
- X86_64_SERIAL_1_3_IRQ
- X86_64_SERIAL_2_4_IRQ
- ZERO_PAGE_OFFSET
- acpi::ADR_SPACE_SYSTEM_IO
- acpi::CPUID_LEAF0_EBX_CPUID_SHIFT
- acpi::DSDT_REVISION
- acpi::FADT_FIELD_DSDT_ADDR
- acpi::FADT_FIELD_DSDT_ADDR32
- acpi::FADT_FIELD_FACS_ADDR
- acpi::FADT_FIELD_FACS_ADDR32
- acpi::FADT_FIELD_FLAGS
- acpi::FADT_FIELD_GPE0_BLK_ADDR
- acpi::FADT_FIELD_GPE0_BLK_LEN
- acpi::FADT_FIELD_GPE1_BASE
- acpi::FADT_FIELD_GPE1_BLK_ADDR
- acpi::FADT_FIELD_GPE1_BLK_LEN
- acpi::FADT_FIELD_HYPERVISOR_ID
- acpi::FADT_FIELD_MINOR_REVISION
- acpi::FADT_FIELD_PM1A_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_PM1A_CONTROL_BLK_LEN
- acpi::FADT_FIELD_PM1A_EVENT_BLK_ADDR
- acpi::FADT_FIELD_PM1A_EVENT_BLK_LEN
- acpi::FADT_FIELD_PM1B_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_PM1B_EVENT_BLK_ADDR
- acpi::FADT_FIELD_PM2_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_PM2_CONTROL_BLK_LEN
- acpi::FADT_FIELD_PM_TMR_BLK_ADDR
- acpi::FADT_FIELD_PM_TMR_LEN
- acpi::FADT_FIELD_RESET_REGISTER
- acpi::FADT_FIELD_RESET_VALUE
- acpi::FADT_FIELD_RTC_CENTURY
- acpi::FADT_FIELD_RTC_DAY_ALARM
- acpi::FADT_FIELD_RTC_MONTH_ALARM
- acpi::FADT_FIELD_SCI_INTERRUPT
- acpi::FADT_FIELD_SMI_COMMAND
- acpi::FADT_FIELD_X_GPE0_BLK_ADDR
- acpi::FADT_FIELD_X_GPE1_BLK_ADDR
- acpi::FADT_FIELD_X_PM1A_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_X_PM1A_EVENT_BLK_ADDR
- acpi::FADT_FIELD_X_PM1B_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_X_PM1B_EVENT_BLK_ADDR
- acpi::FADT_FIELD_X_PM2_CONTROL_BLK_ADDR
- acpi::FADT_FIELD_X_PM_TMR_BLK_ADDR
- acpi::FADT_LEN
- acpi::FADT_LOW_POWER_S2IDLE
- acpi::FADT_MINOR_REVISION
- acpi::FADT_POWER_BUTTON
- acpi::FADT_RESET_REGISTER
- acpi::FADT_REVISION
- acpi::MADT_ENABLED
- acpi::MADT_FIELD_FLAGS
- acpi::MADT_FIELD_LAPIC_ADDR
- acpi::MADT_FLAG_PCAT_COMPAT
- acpi::MADT_INT_POLARITY_ACTIVE_LOW
- acpi::MADT_INT_TRIGGER_LEVEL
- acpi::MADT_LEN
- acpi::MADT_MIN_LOCAL_APIC_ID
- acpi::MADT_REVISION
- acpi::MADT_STRUCTURE_LEN
- acpi::MADT_STRUCTURE_TYPE
- acpi::MADT_TYPE_INTERRUPT_SOURCE_OVERRIDE
- acpi::MADT_TYPE_IO_APIC
- acpi::MADT_TYPE_LOCAL_APIC
- acpi::MADT_TYPE_LOCAL_X2APIC
- acpi::MCFG_FIELD_BASE_ADDRESS
- acpi::MCFG_FIELD_END_BUS_NUMBER
- acpi::MCFG_FIELD_START_BUS_NUMBER
- acpi::MCFG_LEN
- acpi::MCFG_REVISION
- acpi::OEM_REVISION
- acpi::SSDT_REVISION
- acpi::XSDT_REVISION
- acpi::_FADT_SLEEP_BUTTON
- bootparam::XLF_CAN_BE_LOADED_ABOVE_4G
- bootparam::XLF_KERNEL_64
- cpuid::AMD_EBX
- cpuid::AMD_ECX
- cpuid::AMD_EDX
- cpuid::EAX_CORE_TEMP
- cpuid::EAX_CORE_TYPE_ATOM
- cpuid::EAX_CORE_TYPE_CORE
- cpuid::EAX_CORE_TYPE_SHIFT
- cpuid::EAX_CPU_CORES_SHIFT
- cpuid::EAX_HWP_EPP_SHIFT
- cpuid::EAX_HWP_NOTIFICATION_SHIFT
- cpuid::EAX_HWP_SHIFT
- cpuid::EAX_ITMT_SHIFT
- cpuid::EAX_PKG_TEMP
- cpuid::EBX_CLFLUSH_CACHELINE
- cpuid::EBX_CLFLUSH_SIZE_SHIFT
- cpuid::EBX_CPUID_SHIFT
- cpuid::EBX_CPU_COUNT_SHIFT
- cpuid::ECX_EPB_SHIFT
- cpuid::ECX_HCFC_PERF_SHIFT
- cpuid::ECX_HYPERVISOR_SHIFT
- cpuid::ECX_TOPO_CORE_TYPE
- cpuid::ECX_TOPO_SMT_TYPE
- cpuid::ECX_TOPO_TYPE_SHIFT
- cpuid::ECX_TSC_DEADLINE_TIMER_SHIFT
- cpuid::ECX_X2APIC_SHIFT
- cpuid::EDX_HTT_SHIFT
- cpuid::EDX_HYBRID_CPU_SHIFT
- cpuid::INTEL_EBX
- cpuid::INTEL_ECX
- cpuid::INTEL_EDX
- cpuid::MANUFACTURER_ID_FUNCTION
- interrupts::APIC_LVT0_OFFSET
- interrupts::APIC_LVT0_REGISTER
- interrupts::APIC_LVT1_OFFSET
- interrupts::APIC_LVT1_REGISTER
- interrupts::APIC_MODE_EXTINT
- interrupts::APIC_MODE_NMI
- mpspec::BUSTYPE_CBUS
- mpspec::BUSTYPE_CBUSII
- mpspec::BUSTYPE_EISA
- mpspec::BUSTYPE_FUTURE
- mpspec::BUSTYPE_INTERN
- mpspec::BUSTYPE_ISA
- mpspec::BUSTYPE_MBI
- mpspec::BUSTYPE_MBII
- mpspec::BUSTYPE_MCA
- mpspec::BUSTYPE_MPI
- mpspec::BUSTYPE_MPSA
- mpspec::BUSTYPE_NUBUS
- mpspec::BUSTYPE_PCI
- mpspec::BUSTYPE_PCMCIA
- mpspec::BUSTYPE_TC
- mpspec::BUSTYPE_VL
- mpspec::BUSTYPE_VME
- mpspec::BUSTYPE_XPRESS
- mpspec::CPU_BOOTPROCESSOR
- mpspec::CPU_ENABLED
- mpspec::CPU_FAMILY_MASK
- mpspec::CPU_MODEL_MASK
- mpspec::CPU_STEPPING_MASK
- mpspec::MPC_APIC_USABLE
- mpspec::MPC_OEM_SIGNATURE
- mpspec::MPC_SIGNATURE
- mpspec::MP_APIC_ALL
- mpspec::MP_BUS
- mpspec::MP_INTSRC
- mpspec::MP_IOAPIC
- mpspec::MP_IRQDIR_DEFAULT
- mpspec::MP_IRQDIR_HIGH
- mpspec::MP_IRQDIR_LOW
- mpspec::MP_LEVEL_TRIGGER
- mpspec::MP_LINTSRC
- mpspec::MP_PROCESSOR
- mpspec::MP_TRANSLATION
- mpspec::mp_bustype_MP_BUS_EISA
- mpspec::mp_bustype_MP_BUS_ISA
- mpspec::mp_bustype_MP_BUS_PCI
- mpspec::mp_irq_source_types_mp_ExtINT
- mpspec::mp_irq_source_types_mp_INT
- mpspec::mp_irq_source_types_mp_NMI
- mpspec::mp_irq_source_types_mp_SMI
- mptable::APIC_DEFAULT_PHYS_BASE
- mptable::APIC_VERSION
- mptable::BUS_TYPE_ISA
- mptable::BUS_TYPE_PCI
- mptable::CPU_FEATURE_APIC
- mptable::CPU_FEATURE_FPU
- mptable::CPU_STEPPING
- mptable::IO_APIC_DEFAULT_PHYS_BASE
- mptable::MPC_OEM
- mptable::MPC_PRODUCT_ID
- mptable::MPC_SIGNATURE
- mptable::MPC_SPEC
- mptable::MPTABLE_START
- mptable::SMP_MAGIC_IDENT
- msr_index::ATM_LNC_C6_AUTO_DEMOTE
- msr_index::DEBUGCTLMSR_BTF
- msr_index::DEBUGCTLMSR_BTINT
- msr_index::DEBUGCTLMSR_BTS
- msr_index::DEBUGCTLMSR_BTS_OFF_OS
- msr_index::DEBUGCTLMSR_BTS_OFF_USR
- msr_index::DEBUGCTLMSR_FREEZE_LBRS_ON_PMI
- msr_index::DEBUGCTLMSR_LBR
- msr_index::DEBUGCTLMSR_TR
- msr_index::EFER_FFXSR
- msr_index::EFER_LMA
- msr_index::EFER_LME
- msr_index::EFER_LMSLE
- msr_index::EFER_NX
- msr_index::EFER_SCE
- msr_index::EFER_SVME
- msr_index::ENERGY_PERF_BIAS_NORMAL
- msr_index::ENERGY_PERF_BIAS_PERFORMANCE
- msr_index::ENERGY_PERF_BIAS_POWERSAVE
- msr_index::FAM10H_MMIO_CONF_BASE_MASK
- msr_index::FAM10H_MMIO_CONF_BASE_SHIFT
- msr_index::FAM10H_MMIO_CONF_BUSRANGE_MASK
- msr_index::FAM10H_MMIO_CONF_BUSRANGE_SHIFT
- msr_index::FAM10H_MMIO_CONF_ENABLE
- msr_index::FEATURE_CONTROL_LMCE
- msr_index::FEATURE_CONTROL_LOCKED
- msr_index::FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX
- msr_index::FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX
- msr_index::HWP_ACTIVITY_WINDOW_BIT
- msr_index::HWP_BASE_BIT
- msr_index::HWP_ENERGY_PERF_PREFERENCE_BIT
- msr_index::HWP_NOTIFICATIONS_BIT
- msr_index::HWP_PACKAGE_LEVEL_REQUEST_BIT
- msr_index::INTEL_PERF_CTL_MASK
- msr_index::K8_INTP_C1E_ACTIVE_MASK
- msr_index::K8_MTRRFIXRANGE_DRAM_ENABLE
- msr_index::K8_MTRRFIXRANGE_DRAM_MODIFY
- msr_index::K8_MTRR_RDMEM_WRMEM_MASK
- msr_index::LBR_INFO_CYCLES
- msr_index::MSR_AMD64_BU_CFG2
- msr_index::MSR_AMD64_DC_CFG
- msr_index::MSR_AMD64_IBSBRTARGET
- msr_index::MSR_AMD64_IBSCTL
- msr_index::MSR_AMD64_IBSDCLINAD
- msr_index::MSR_AMD64_IBSDCPHYSAD
- msr_index::MSR_AMD64_IBSFETCHCTL
- msr_index::MSR_AMD64_IBSFETCHLINAD
- msr_index::MSR_AMD64_IBSFETCHPHYSAD
- msr_index::MSR_AMD64_IBSFETCH_REG_COUNT
- msr_index::MSR_AMD64_IBSFETCH_REG_MASK
- msr_index::MSR_AMD64_IBSOPCTL
- msr_index::MSR_AMD64_IBSOPDATA
- msr_index::MSR_AMD64_IBSOPDATA2
- msr_index::MSR_AMD64_IBSOPDATA3
- msr_index::MSR_AMD64_IBSOPDATA4
- msr_index::MSR_AMD64_IBSOPRIP
- msr_index::MSR_AMD64_IBSOP_REG_COUNT
- msr_index::MSR_AMD64_IBSOP_REG_MASK
- msr_index::MSR_AMD64_IBS_REG_COUNT_MAX
- msr_index::MSR_AMD64_LS_CFG
- msr_index::MSR_AMD64_MC0_MASK
- msr_index::MSR_AMD64_NB_CFG
- msr_index::MSR_AMD64_OSVW_ID_LENGTH
- msr_index::MSR_AMD64_OSVW_STATUS
- msr_index::MSR_AMD64_PATCH_LEVEL
- msr_index::MSR_AMD64_PATCH_LOADER
- msr_index::MSR_AMD64_TSC_RATIO
- msr_index::MSR_AMD_PERF_CTL
- msr_index::MSR_AMD_PERF_STATUS
- msr_index::MSR_AMD_PSTATE_DEF_BASE
- msr_index::MSR_ATOM_CORE_RATIOS
- msr_index::MSR_ATOM_CORE_TURBO_RATIOS
- msr_index::MSR_ATOM_CORE_TURBO_VIDS
- msr_index::MSR_ATOM_CORE_VIDS
- msr_index::MSR_ATOM_PKG_C6_RESIDENCY
- msr_index::MSR_CC6_DEMOTION_POLICY_CONFIG
- msr_index::MSR_CONFIG_TDP_CONTROL
- msr_index::MSR_CONFIG_TDP_LEVEL_1
- msr_index::MSR_CONFIG_TDP_LEVEL_2
- msr_index::MSR_CONFIG_TDP_NOMINAL
- msr_index::MSR_CORE_C1_RES
- msr_index::MSR_CORE_C3_RESIDENCY
- msr_index::MSR_CORE_C6_RESIDENCY
- msr_index::MSR_CORE_C7_RESIDENCY
- msr_index::MSR_CORE_PERF_FIXED_CTR0
- msr_index::MSR_CORE_PERF_FIXED_CTR1
- msr_index::MSR_CORE_PERF_FIXED_CTR2
- msr_index::MSR_CORE_PERF_FIXED_CTR_CTRL
- msr_index::MSR_CORE_PERF_GLOBAL_CTRL
- msr_index::MSR_CORE_PERF_GLOBAL_OVF_CTRL
- msr_index::MSR_CORE_PERF_GLOBAL_STATUS
- msr_index::MSR_CORE_PERF_LIMIT_REASONS
- msr_index::MSR_CSTAR
- msr_index::MSR_DRAM_ENERGY_STATUS
- msr_index::MSR_DRAM_PERF_STATUS
- msr_index::MSR_DRAM_POWER_INFO
- msr_index::MSR_DRAM_POWER_LIMIT
- msr_index::MSR_EBC_FREQUENCY_ID
- msr_index::MSR_EFER
- msr_index::MSR_F15H_IC_CFG
- msr_index::MSR_F15H_NB_PERF_CTL
- msr_index::MSR_F15H_NB_PERF_CTR
- msr_index::MSR_F15H_PERF_CTL
- msr_index::MSR_F15H_PERF_CTR
- msr_index::MSR_F15H_PTSC
- msr_index::MSR_F16H_DR0_ADDR_MASK
- msr_index::MSR_F16H_DR1_ADDR_MASK
- msr_index::MSR_F16H_DR2_ADDR_MASK
- msr_index::MSR_F16H_DR3_ADDR_MASK
- msr_index::MSR_F16H_L2I_PERF_CTL
- msr_index::MSR_F16H_L2I_PERF_CTR
- msr_index::MSR_F17H_IRPERF
- msr_index::MSR_FAM10H_MMIO_CONF_BASE
- msr_index::MSR_FAM10H_NODE_ID
- msr_index::MSR_FSB_FREQ
- msr_index::MSR_FS_BASE
- msr_index::MSR_GEODE_BUSCONT_CONF0
- msr_index::MSR_GFX_PERF_LIMIT_REASONS
- msr_index::MSR_GS_BASE
- msr_index::MSR_HWP_CAPABILITIES
- msr_index::MSR_HWP_INTERRUPT
- msr_index::MSR_HWP_REQUEST
- msr_index::MSR_HWP_REQUEST_PKG
- msr_index::MSR_HWP_STATUS
- msr_index::MSR_IA32_APERF
- msr_index::MSR_IA32_APICBASE
- msr_index::MSR_IA32_APICBASE_BASE
- msr_index::MSR_IA32_APICBASE_BSP
- msr_index::MSR_IA32_APICBASE_ENABLE
- msr_index::MSR_IA32_BBL_CR_CTL
- msr_index::MSR_IA32_BBL_CR_CTL3
- msr_index::MSR_IA32_BNDCFGS
- msr_index::MSR_IA32_CR_PAT
- msr_index::MSR_IA32_DEBUGCTLMSR
- msr_index::MSR_IA32_DS_AREA
- msr_index::MSR_IA32_EBL_CR_POWERON
- msr_index::MSR_IA32_ENERGY_PERF_BIAS
- msr_index::MSR_IA32_FEATURE_CONTROL
- msr_index::MSR_IA32_LASTBRANCHFROMIP
- msr_index::MSR_IA32_LASTBRANCHTOIP
- msr_index::MSR_IA32_LASTINTFROMIP
- msr_index::MSR_IA32_LASTINTTOIP
- msr_index::MSR_IA32_MC0_ADDR
- msr_index::MSR_IA32_MC0_CTL
- msr_index::MSR_IA32_MC0_CTL2
- msr_index::MSR_IA32_MC0_MISC
- msr_index::MSR_IA32_MC0_STATUS
- msr_index::MSR_IA32_MCG_CAP
- msr_index::MSR_IA32_MCG_CTL
- msr_index::MSR_IA32_MCG_EAX
- msr_index::MSR_IA32_MCG_EBP
- msr_index::MSR_IA32_MCG_EBX
- msr_index::MSR_IA32_MCG_ECX
- msr_index::MSR_IA32_MCG_EDI
- msr_index::MSR_IA32_MCG_EDX
- msr_index::MSR_IA32_MCG_EFLAGS
- msr_index::MSR_IA32_MCG_EIP
- msr_index::MSR_IA32_MCG_ESI
- msr_index::MSR_IA32_MCG_ESP
- msr_index::MSR_IA32_MCG_EXT_CTL
- msr_index::MSR_IA32_MCG_RESERVED
- msr_index::MSR_IA32_MCG_STATUS
- msr_index::MSR_IA32_MISC_ENABLE
- msr_index::MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
- msr_index::MSR_IA32_MISC_ENABLE_BTS_UNAVAIL_BIT
- msr_index::MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_EMON
- msr_index::MSR_IA32_MISC_ENABLE_EMON_BIT
- msr_index::MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP
- msr_index::MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP_BIT
- msr_index::MSR_IA32_MISC_ENABLE_FAST_STRING
- msr_index::MSR_IA32_MISC_ENABLE_FAST_STRING_BIT
- msr_index::MSR_IA32_MISC_ENABLE_FERR
- msr_index::MSR_IA32_MISC_ENABLE_FERR_BIT
- msr_index::MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX
- msr_index::MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX_BIT
- msr_index::MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_L1D_CONTEXT
- msr_index::MSR_IA32_MISC_ENABLE_L1D_CONTEXT_BIT
- msr_index::MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_LIMIT_CPUID
- msr_index::MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT
- msr_index::MSR_IA32_MISC_ENABLE_MWAIT
- msr_index::MSR_IA32_MISC_ENABLE_MWAIT_BIT
- msr_index::MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL
- msr_index::MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL_BIT
- msr_index::MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK
- msr_index::MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK_BIT
- msr_index::MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK
- msr_index::MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK_BIT
- msr_index::MSR_IA32_MISC_ENABLE_TCC
- msr_index::MSR_IA32_MISC_ENABLE_TCC_BIT
- msr_index::MSR_IA32_MISC_ENABLE_TM1
- msr_index::MSR_IA32_MISC_ENABLE_TM1_BIT
- msr_index::MSR_IA32_MISC_ENABLE_TM2
- msr_index::MSR_IA32_MISC_ENABLE_TM2_BIT
- msr_index::MSR_IA32_MISC_ENABLE_TURBO_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_TURBO_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_X87_COMPAT
- msr_index::MSR_IA32_MISC_ENABLE_X87_COMPAT_BIT
- msr_index::MSR_IA32_MISC_ENABLE_XD_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT
- msr_index::MSR_IA32_MISC_ENABLE_XTPR_DISABLE
- msr_index::MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT
- msr_index::MSR_IA32_MPERF
- msr_index::MSR_IA32_P5_MC_ADDR
- msr_index::MSR_IA32_P5_MC_TYPE
- msr_index::MSR_IA32_PACKAGE_THERM_INTERRUPT
- msr_index::MSR_IA32_PACKAGE_THERM_STATUS
- msr_index::MSR_IA32_PEBS_ENABLE
- msr_index::MSR_IA32_PERFCTR0
- msr_index::MSR_IA32_PERFCTR1
- msr_index::MSR_IA32_PERF_CAPABILITIES
- msr_index::MSR_IA32_PERF_CTL
- msr_index::MSR_IA32_PERF_STATUS
- msr_index::MSR_IA32_PLATFORM_ID
- msr_index::MSR_IA32_PMC0
- msr_index::MSR_IA32_POWER_CTL
- msr_index::MSR_IA32_RTIT_ADDR0_A
- msr_index::MSR_IA32_RTIT_ADDR0_B
- msr_index::MSR_IA32_RTIT_ADDR1_A
- msr_index::MSR_IA32_RTIT_ADDR1_B
- msr_index::MSR_IA32_RTIT_ADDR2_A
- msr_index::MSR_IA32_RTIT_ADDR2_B
- msr_index::MSR_IA32_RTIT_ADDR3_A
- msr_index::MSR_IA32_RTIT_ADDR3_B
- msr_index::MSR_IA32_RTIT_CR3_MATCH
- msr_index::MSR_IA32_RTIT_CTL
- msr_index::MSR_IA32_RTIT_OUTPUT_BASE
- msr_index::MSR_IA32_RTIT_OUTPUT_MASK
- msr_index::MSR_IA32_RTIT_STATUS
- msr_index::MSR_IA32_SMBASE
- msr_index::MSR_IA32_SMM_MONITOR_CTL
- msr_index::MSR_IA32_SYSENTER_CS
- msr_index::MSR_IA32_SYSENTER_EIP
- msr_index::MSR_IA32_SYSENTER_ESP
- msr_index::MSR_IA32_TEMPERATURE_TARGET
- msr_index::MSR_IA32_THERM_CONTROL
- msr_index::MSR_IA32_THERM_INTERRUPT
- msr_index::MSR_IA32_THERM_STATUS
- msr_index::MSR_IA32_TSC
- msr_index::MSR_IA32_TSCDEADLINE
- msr_index::MSR_IA32_TSC_ADJUST
- msr_index::MSR_IA32_TSC_DEADLINE
- msr_index::MSR_IA32_UCODE_REV
- msr_index::MSR_IA32_UCODE_WRITE
- msr_index::MSR_IA32_VMX_BASIC
- msr_index::MSR_IA32_VMX_CR0_FIXED0
- msr_index::MSR_IA32_VMX_CR0_FIXED1
- msr_index::MSR_IA32_VMX_CR4_FIXED0
- msr_index::MSR_IA32_VMX_CR4_FIXED1
- msr_index::MSR_IA32_VMX_ENTRY_CTLS
- msr_index::MSR_IA32_VMX_EPT_VPID_CAP
- msr_index::MSR_IA32_VMX_EXIT_CTLS
- msr_index::MSR_IA32_VMX_MISC
- msr_index::MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE
- msr_index::MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS
- msr_index::MSR_IA32_VMX_PINBASED_CTLS
- msr_index::MSR_IA32_VMX_PROCBASED_CTLS
- msr_index::MSR_IA32_VMX_PROCBASED_CTLS2
- msr_index::MSR_IA32_VMX_TRUE_ENTRY_CTLS
- msr_index::MSR_IA32_VMX_TRUE_EXIT_CTLS
- msr_index::MSR_IA32_VMX_TRUE_PINBASED_CTLS
- msr_index::MSR_IA32_VMX_TRUE_PROCBASED_CTLS
- msr_index::MSR_IA32_VMX_VMCS_ENUM
- msr_index::MSR_IA32_VMX_VMFUNC
- msr_index::MSR_IA32_XSS
- msr_index::MSR_IDT_FCR1
- msr_index::MSR_IDT_FCR2
- msr_index::MSR_IDT_FCR3
- msr_index::MSR_IDT_FCR4
- msr_index::MSR_IDT_MCR0
- msr_index::MSR_IDT_MCR1
- msr_index::MSR_IDT_MCR2
- msr_index::MSR_IDT_MCR3
- msr_index::MSR_IDT_MCR4
- msr_index::MSR_IDT_MCR5
- msr_index::MSR_IDT_MCR6
- msr_index::MSR_IDT_MCR7
- msr_index::MSR_IDT_MCR_CTRL
- msr_index::MSR_K6_EPMR
- msr_index::MSR_K6_PFIR
- msr_index::MSR_K6_PSOR
- msr_index::MSR_K6_UWCCR
- msr_index::MSR_K6_WHCR
- msr_index::MSR_K7_CLK_CTL
- msr_index::MSR_K7_EVNTSEL0
- msr_index::MSR_K7_EVNTSEL1
- msr_index::MSR_K7_EVNTSEL2
- msr_index::MSR_K7_EVNTSEL3
- msr_index::MSR_K7_FID_VID_CTL
- msr_index::MSR_K7_FID_VID_STATUS
- msr_index::MSR_K7_HWCR
- msr_index::MSR_K7_PERFCTR0
- msr_index::MSR_K7_PERFCTR1
- msr_index::MSR_K7_PERFCTR2
- msr_index::MSR_K7_PERFCTR3
- msr_index::MSR_K8_INT_PENDING_MSG
- msr_index::MSR_K8_SYSCFG
- msr_index::MSR_K8_TOP_MEM1
- msr_index::MSR_K8_TOP_MEM2
- msr_index::MSR_K8_TSEG_ADDR
- msr_index::MSR_K8_TSEG_MASK
- msr_index::MSR_KERNEL_GS_BASE
- msr_index::MSR_KNC_EVNTSEL0
- msr_index::MSR_KNC_EVNTSEL1
- msr_index::MSR_KNC_PERFCTR0
- msr_index::MSR_KNC_PERFCTR1
- msr_index::MSR_KNL_CORE_C6_RESIDENCY
- msr_index::MSR_LBR_CORE_FROM
- msr_index::MSR_LBR_CORE_TO
- msr_index::MSR_LBR_INFO_0
- msr_index::MSR_LBR_NHM_FROM
- msr_index::MSR_LBR_NHM_TO
- msr_index::MSR_LBR_SELECT
- msr_index::MSR_LBR_TOS
- msr_index::MSR_LSTAR
- msr_index::MSR_MC6_DEMOTION_POLICY_CONFIG
- msr_index::MSR_MISC_FEATURE_CONTROL
- msr_index::MSR_MISC_FEATURE_ENABLES
- msr_index::MSR_MISC_FEATURE_ENABLES_RING3MWAIT_BIT
- msr_index::MSR_MISC_PWR_MGMT
- msr_index::MSR_MODULE_C6_RES_MS
- msr_index::MSR_MTRRcap
- msr_index::MSR_MTRRdefType
- msr_index::MSR_MTRRfix16K_80000
- msr_index::MSR_MTRRfix16K_A0000
- msr_index::MSR_MTRRfix4K_C0000
- msr_index::MSR_MTRRfix4K_C8000
- msr_index::MSR_MTRRfix4K_D0000
- msr_index::MSR_MTRRfix4K_D8000
- msr_index::MSR_MTRRfix4K_E0000
- msr_index::MSR_MTRRfix4K_E8000
- msr_index::MSR_MTRRfix4K_F0000
- msr_index::MSR_MTRRfix4K_F8000
- msr_index::MSR_MTRRfix64K_00000
- msr_index::MSR_OFFCORE_RSP_0
- msr_index::MSR_OFFCORE_RSP_1
- msr_index::MSR_P4_ALF_ESCR0
- msr_index::MSR_P4_ALF_ESCR1
- msr_index::MSR_P4_BPU_CCCR0
- msr_index::MSR_P4_BPU_CCCR1
- msr_index::MSR_P4_BPU_CCCR2
- msr_index::MSR_P4_BPU_CCCR3
- msr_index::MSR_P4_BPU_ESCR0
- msr_index::MSR_P4_BPU_ESCR1
- msr_index::MSR_P4_BPU_PERFCTR0
- msr_index::MSR_P4_BPU_PERFCTR1
- msr_index::MSR_P4_BPU_PERFCTR2
- msr_index::MSR_P4_BPU_PERFCTR3
- msr_index::MSR_P4_BSU_ESCR0
- msr_index::MSR_P4_BSU_ESCR1
- msr_index::MSR_P4_CRU_ESCR0
- msr_index::MSR_P4_CRU_ESCR1
- msr_index::MSR_P4_CRU_ESCR2
- msr_index::MSR_P4_CRU_ESCR3
- msr_index::MSR_P4_CRU_ESCR4
- msr_index::MSR_P4_CRU_ESCR5
- msr_index::MSR_P4_DAC_ESCR0
- msr_index::MSR_P4_DAC_ESCR1
- msr_index::MSR_P4_FIRM_ESCR0
- msr_index::MSR_P4_FIRM_ESCR1
- msr_index::MSR_P4_FLAME_CCCR0
- msr_index::MSR_P4_FLAME_CCCR1
- msr_index::MSR_P4_FLAME_CCCR2
- msr_index::MSR_P4_FLAME_CCCR3
- msr_index::MSR_P4_FLAME_ESCR0
- msr_index::MSR_P4_FLAME_ESCR1
- msr_index::MSR_P4_FLAME_PERFCTR0
- msr_index::MSR_P4_FLAME_PERFCTR1
- msr_index::MSR_P4_FLAME_PERFCTR2
- msr_index::MSR_P4_FLAME_PERFCTR3
- msr_index::MSR_P4_FSB_ESCR0
- msr_index::MSR_P4_FSB_ESCR1
- msr_index::MSR_P4_IQ_CCCR0
- msr_index::MSR_P4_IQ_CCCR1
- msr_index::MSR_P4_IQ_CCCR2
- msr_index::MSR_P4_IQ_CCCR3
- msr_index::MSR_P4_IQ_CCCR4
- msr_index::MSR_P4_IQ_CCCR5
- msr_index::MSR_P4_IQ_ESCR0
- msr_index::MSR_P4_IQ_ESCR1
- msr_index::MSR_P4_IQ_PERFCTR0
- msr_index::MSR_P4_IQ_PERFCTR1
- msr_index::MSR_P4_IQ_PERFCTR2
- msr_index::MSR_P4_IQ_PERFCTR3
- msr_index::MSR_P4_IQ_PERFCTR4
- msr_index::MSR_P4_IQ_PERFCTR5
- msr_index::MSR_P4_IS_ESCR0
- msr_index::MSR_P4_IS_ESCR1
- msr_index::MSR_P4_ITLB_ESCR0
- msr_index::MSR_P4_ITLB_ESCR1
- msr_index::MSR_P4_IX_ESCR0
- msr_index::MSR_P4_IX_ESCR1
- msr_index::MSR_P4_MOB_ESCR0
- msr_index::MSR_P4_MOB_ESCR1
- msr_index::MSR_P4_MS_CCCR0
- msr_index::MSR_P4_MS_CCCR1
- msr_index::MSR_P4_MS_CCCR2
- msr_index::MSR_P4_MS_CCCR3
- msr_index::MSR_P4_MS_ESCR0
- msr_index::MSR_P4_MS_ESCR1
- msr_index::MSR_P4_MS_PERFCTR0
- msr_index::MSR_P4_MS_PERFCTR1
- msr_index::MSR_P4_MS_PERFCTR2
- msr_index::MSR_P4_MS_PERFCTR3
- msr_index::MSR_P4_PEBS_MATRIX_VERT
- msr_index::MSR_P4_PMH_ESCR0
- msr_index::MSR_P4_PMH_ESCR1
- msr_index::MSR_P4_RAT_ESCR0
- msr_index::MSR_P4_RAT_ESCR1
- msr_index::MSR_P4_SAAT_ESCR0
- msr_index::MSR_P4_SAAT_ESCR1
- msr_index::MSR_P4_SSU_ESCR0
- msr_index::MSR_P4_SSU_ESCR1
- msr_index::MSR_P4_TBPU_ESCR0
- msr_index::MSR_P4_TBPU_ESCR1
- msr_index::MSR_P4_TC_ESCR0
- msr_index::MSR_P4_TC_ESCR1
- msr_index::MSR_P4_U2L_ESCR0
- msr_index::MSR_P4_U2L_ESCR1
- msr_index::MSR_P6_EVNTSEL0
- msr_index::MSR_P6_EVNTSEL1
- msr_index::MSR_P6_PERFCTR0
- msr_index::MSR_P6_PERFCTR1
- msr_index::MSR_PEBS_FRONTEND
- msr_index::MSR_PEBS_LD_LAT_THRESHOLD
- msr_index::MSR_PERF_LIMIT_REASONS
- msr_index::MSR_PKGC10_IRTL
- msr_index::MSR_PKGC3_IRTL
- msr_index::MSR_PKGC6_IRTL
- msr_index::MSR_PKGC7_IRTL
- msr_index::MSR_PKGC8_IRTL
- msr_index::MSR_PKGC9_IRTL
- msr_index::MSR_PKG_ANY_CORE_C0_RES
- msr_index::MSR_PKG_ANY_GFXE_C0_RES
- msr_index::MSR_PKG_BOTH_CORE_GFXE_C0_RES
- msr_index::MSR_PKG_C10_RESIDENCY
- msr_index::MSR_PKG_C2_RESIDENCY
- msr_index::MSR_PKG_C3_RESIDENCY
- msr_index::MSR_PKG_C6_RESIDENCY
- msr_index::MSR_PKG_C7_RESIDENCY
- msr_index::MSR_PKG_C8_RESIDENCY
- msr_index::MSR_PKG_C9_RESIDENCY
- msr_index::MSR_PKG_CST_CONFIG_CONTROL
- msr_index::MSR_PKG_ENERGY_STATUS
- msr_index::MSR_PKG_PERF_STATUS
- msr_index::MSR_PKG_POWER_INFO
- msr_index::MSR_PKG_POWER_LIMIT
- msr_index::MSR_PKG_WEIGHTED_CORE_C0_RES
- msr_index::MSR_PLATFORM_ENERGY_STATUS
- msr_index::MSR_PLATFORM_INFO
- msr_index::MSR_PM_ENABLE
- msr_index::MSR_PP0_ENERGY_STATUS
- msr_index::MSR_PP0_PERF_STATUS
- msr_index::MSR_PP0_POLICY
- msr_index::MSR_PP0_POWER_LIMIT
- msr_index::MSR_PP1_ENERGY_STATUS
- msr_index::MSR_PP1_POLICY
- msr_index::MSR_PP1_POWER_LIMIT
- msr_index::MSR_PPERF
- msr_index::MSR_PPIN
- msr_index::MSR_PPIN_CTL
- msr_index::MSR_RAPL_POWER_UNIT
- msr_index::MSR_RING_PERF_LIMIT_REASONS
- msr_index::MSR_SMI_COUNT
- msr_index::MSR_STAR
- msr_index::MSR_SYSCALL_MASK
- msr_index::MSR_THERM2_CTL
- msr_index::MSR_THERM2_CTL_TM_SELECT
- msr_index::MSR_TMTA_LONGRUN_CTRL
- msr_index::MSR_TMTA_LONGRUN_FLAGS
- msr_index::MSR_TMTA_LRTI_READOUT
- msr_index::MSR_TMTA_LRTI_VOLT_MHZ
- msr_index::MSR_TSC_AUX
- msr_index::MSR_TURBO_ACTIVATION_RATIO
- msr_index::MSR_TURBO_RATIO_LIMIT
- msr_index::MSR_TURBO_RATIO_LIMIT1
- msr_index::MSR_TURBO_RATIO_LIMIT2
- msr_index::MSR_VIA_BCR2
- msr_index::MSR_VIA_FCR
- msr_index::MSR_VIA_LONGHAUL
- msr_index::MSR_VIA_RNG
- msr_index::MSR_VM_CR
- msr_index::MSR_VM_HSAVE_PA
- msr_index::MSR_VM_IGNNE
- msr_index::NHM_C1_AUTO_DEMOTE
- msr_index::NHM_C3_AUTO_DEMOTE
- msr_index::PACKAGE_THERM_INT_HIGH_ENABLE
- msr_index::PACKAGE_THERM_INT_LOW_ENABLE
- msr_index::PACKAGE_THERM_INT_PLN_ENABLE
- msr_index::PACKAGE_THERM_STATUS_POWER_LIMIT
- msr_index::PACKAGE_THERM_STATUS_PROCHOT
- msr_index::SNB_C1_AUTO_UNDEMOTE
- msr_index::SNB_C3_AUTO_UNDEMOTE
- msr_index::THERM_INT_HIGH_ENABLE
- msr_index::THERM_INT_LOW_ENABLE
- msr_index::THERM_INT_PLN_ENABLE
- msr_index::THERM_INT_THRESHOLD0_ENABLE
- msr_index::THERM_INT_THRESHOLD1_ENABLE
- msr_index::THERM_LOG_THRESHOLD0
- msr_index::THERM_LOG_THRESHOLD1
- msr_index::THERM_MASK_THRESHOLD0
- msr_index::THERM_MASK_THRESHOLD1
- msr_index::THERM_SHIFT_THRESHOLD0
- msr_index::THERM_SHIFT_THRESHOLD1
- msr_index::THERM_STATUS_POWER_LIMIT
- msr_index::THERM_STATUS_PROCHOT
- msr_index::THERM_STATUS_THRESHOLD0
- msr_index::THERM_STATUS_THRESHOLD1
- msr_index::VMX_BASIC_64
- msr_index::VMX_BASIC_INOUT
- msr_index::VMX_BASIC_MEM_TYPE_MASK
- msr_index::VMX_BASIC_MEM_TYPE_SHIFT
- msr_index::VMX_BASIC_MEM_TYPE_WB
- msr_index::VMX_BASIC_TRUE_CTLS
- msr_index::VMX_BASIC_VMCS_SIZE_SHIFT
- msr_index::_EFER_FFXSR
- msr_index::_EFER_LMA
- msr_index::_EFER_LME
- msr_index::_EFER_LMSLE
- msr_index::_EFER_NX
- msr_index::_EFER_SCE
- msr_index::_EFER_SVME
- regs::BOOT_GDT_OFFSET
- regs::BOOT_IDT_OFFSET
- regs::EFER_LMA
- regs::EFER_LME
- regs::MTRR_ENABLE
- regs::MTRR_MEMTYPE_UC
- regs::MTRR_MEMTYPE_WB
- regs::MTRR_PHYS_BASE_MSR
- regs::MTRR_PHYS_MASK_MSR
- regs::MTRR_VAR_VALID
- regs::VAR_MTRR_NUM_MASK
- regs::X86_CR0_PE
- regs::X86_CR0_PG
- regs::X86_CR4_PAE
- smbios::BIOS_INFORMATION
- smbios::DEFAULT_SMBIOS_BIOS_VENDOR
- smbios::DEFAULT_SMBIOS_BIOS_VERSION
- smbios::DEFAULT_SMBIOS_MANUFACTURER
- smbios::DEFAULT_SMBIOS_PRODUCT_NAME
- smbios::END_OF_TABLE
- smbios::IS_VIRTUAL_MACHINE
- smbios::OEM_STRING
- smbios::PCI_SUPPORTED
- smbios::SM3_MAGIC_IDENT
- smbios::SMBIOS_START
- smbios::SYSTEM_INFORMATION