pub struct PciePort {
    device_id: u16,
    debug_label: String,
    preferred_address: Option<PciAddress>,
    pci_address: Option<PciAddress>,
    bus_range: PciBridgeBusRange,
    pcie_host: Option<PcieHostPort>,
    pcie_config: Arc<Mutex<PcieConfig>>,
    pm_config: Arc<Mutex<PmConfig>>,
    msi_config: Option<Arc<Mutex<MsiConfig>>>,
    root_cap: Arc<Mutex<PcieRootCap>>,
    port_type: PcieDevicePortType,
    prepare_hotplug: bool,
}

Fields§

§device_id: u16§debug_label: String§preferred_address: Option<PciAddress>§pci_address: Option<PciAddress>§bus_range: PciBridgeBusRange§pcie_host: Option<PcieHostPort>§pcie_config: Arc<Mutex<PcieConfig>>§pm_config: Arc<Mutex<PmConfig>>§msi_config: Option<Arc<Mutex<MsiConfig>>>§root_cap: Arc<Mutex<PcieRootCap>>§port_type: PcieDevicePortType§prepare_hotplug: bool

Implementations§

source§

impl PciePort

source

pub fn new( device_id: u16, debug_label: String, primary_bus_num: u8, secondary_bus_num: u8, slot_implemented: bool, port_type: PcieDevicePortType ) -> Self

Constructs a new PCIE port

source

pub fn new_from_host( pcie_host: PcieHostPort, slot_implemented: bool, port_type: PcieDevicePortType ) -> Result<Self, PciDeviceError>

source

pub fn get_device_id(&self) -> u16

source

pub fn get_address(&self) -> Option<PciAddress>

source

pub fn debug_label(&self) -> String

source

pub fn preferred_address(&self) -> Option<PciAddress>

source

pub fn allocate_address( &mut self, resources: &mut SystemAllocator ) -> Result<PciAddress, PciDeviceError>

source

pub fn read_config(&self, reg_idx: usize, data: &mut u32)

source

pub fn write_config(&mut self, reg_idx: usize, offset: u64, data: &[u8])

source

pub fn handle_cap_write_result(&mut self, res: Box<dyn PciCapConfigWriteResult>)

source

pub fn get_caps( &self ) -> Vec<(Box<dyn PciCapability>, Option<Box<dyn PciCapConfig>>)>

source

pub fn get_bus_range(&self) -> Option<PciBridgeBusRange>

source

pub fn get_bridge_window_size(&self) -> (u64, u64)

source

pub fn get_slot_control(&self) -> u16

source

pub fn clone_interrupt(&mut self, msi_config: Arc<Mutex<MsiConfig>>)

source

pub fn hotplug_implemented(&self) -> bool

source

pub fn inject_pme(&mut self, requester_id: u16)

source

pub fn is_hpc_pending(&self) -> bool

Has command completion pending.

source

pub fn set_hpc_sender(&mut self, event: Event)

Sets a sender for hot plug or unplug complete.

source

pub fn trigger_hp_or_pme_interrupt(&mut self)

source

pub fn is_host(&self) -> bool

source

pub fn is_hotplug_ready(&self) -> bool

Checks if the slot is enabled by guest and ready for hotplug events.

source

pub fn get_ready_notification(&mut self) -> Result<Event, PciDeviceError>

Gets a notification when the port is ready for hotplug. If the port is already ready, then the notification event is triggerred immediately.

source

pub fn hot_unplug(&mut self)

source

pub fn is_match(&self, host_addr: PciAddress) -> Option<u8>

source

pub fn removed_downstream_valid(&self) -> bool

source

pub fn mask_slot_status(&mut self, mask: u16)

source

pub fn set_slot_status(&mut self, flag: u16)

source

pub fn should_trigger_pme(&mut self) -> bool

source

pub fn prepare_hotplug(&mut self)

Auto Trait Implementations§

Blanket Implementations§

source§

impl<T> Any for T
where T: 'static + ?Sized,

source§

fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
source§

impl<T> Borrow<T> for T
where T: ?Sized,

source§

fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
source§

impl<T> BorrowMut<T> for T
where T: ?Sized,

source§

fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
§

impl<T> Downcast for T
where T: Any,

§

fn into_any(self: Box<T>) -> Box<dyn Any>

Convert Box<dyn Trait> (where Trait: Downcast) to Box<dyn Any>. Box<dyn Any> can then be further downcast into Box<ConcreteType> where ConcreteType implements Trait.
§

fn into_any_rc(self: Rc<T>) -> Rc<dyn Any>

Convert Rc<Trait> (where Trait: Downcast) to Rc<Any>. Rc<Any> can then be further downcast into Rc<ConcreteType> where ConcreteType implements Trait.
§

fn as_any(&self) -> &(dyn Any + 'static)

Convert &Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot generate &Any’s vtable from &Trait’s.
§

fn as_any_mut(&mut self) -> &mut (dyn Any + 'static)

Convert &mut Trait (where Trait: Downcast) to &Any. This is needed since Rust cannot generate &mut Any’s vtable from &mut Trait’s.
§

impl<T> DowncastSync for T
where T: Any + Send + Sync,

§

fn into_any_arc(self: Arc<T>) -> Arc<dyn Any + Send + Sync>

Convert Arc<Trait> (where Trait: Downcast) to Arc<Any>. Arc<Any> can then be further downcast into Arc<ConcreteType> where ConcreteType implements Trait.
source§

impl<T> From<T> for T

source§

fn from(t: T) -> T

Returns the argument unchanged.

source§

impl<T, U> Into<U> for T
where U: From<T>,

source§

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

source§

impl<T, U> TryFrom<U> for T
where U: Into<T>,

§

type Error = Infallible

The type returned in the event of a conversion error.
source§

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
source§

impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

§

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
source§

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.
§

impl<V, T> VZip<V> for T
where V: MultiLane<T>,

§

fn vzip(self) -> V