Struct devices::pci::pcie::pcie_port::PcieConfig

pub struct PcieConfig {
    msi_config: Option<Arc<Mutex<MsiConfig>>>,
    slot_control: Option<u16>,
    slot_status: u16,
    root_cap: Arc<Mutex<PcieRootCap>>,
    port_type: PcieDevicePortType,
    hpc_sender: Option<HotPlugCompleteSender>,
    hp_interrupt_pending: bool,
    removed_downstream_valid: bool,
    enabled: bool,
    hot_plug_ready_notifications: Vec<Event>,
    cap_mapping: Option<PciCapMapping>,
}

Fields

msi_config: Option<Arc<Mutex<MsiConfig>>>

slot_control: Option<u16>

slot_status: u16

root_cap: Arc<Mutex<PcieRootCap>>

port_type: PcieDevicePortType

hpc_sender: Option<HotPlugCompleteSender>

hp_interrupt_pending: bool

removed_downstream_valid: bool

enabled: bool

hot_plug_ready_notifications: Vec<Event>

cap_mapping: Option<PciCapMapping>

Implementations

impl PcieConfig

fn new( root_cap: Arc<Mutex<PcieRootCap>>, slot_implemented: bool, port_type: PcieDevicePortType ) -> Self

fn read_pcie_cap(&self, offset: usize, data: &mut u32)

fn is_hotplug_ready(&self) -> bool

fn get_ready_notification(&mut self) -> Result<Event, PciDeviceError>

Gets a notification when the port is ready for hotplug. If the port is already ready, then the notification event is triggerred immediately.

fn write_pcie_cap(&mut self, offset: usize, data: &[u8])

fn get_slot_control(&self) -> u16

fn trigger_cc_interrupt(&self)

fn trigger_hp_interrupt(&mut self)

fn mask_slot_status(&mut self, mask: u16)

fn set_slot_status(&mut self, flag: u16)

Trait Implementations

impl PciCapConfig for PcieConfig

fn read_mask(&self) -> &'static [u32]

Returns the read mask used by read_reg.

fn read_reg(&self, reg_idx: usize) -> u32

Reads a 32bit register from the capability. Only the bits set in the read mask will be used, while the rest of the bits will be taken from the PciConfiguration’s register data. reg_idx - index into the capability

fn write_reg( &mut self, reg_idx: usize, offset: u64, data: &[u8] ) -> Option<Box<dyn PciCapConfigWriteResult>>

Writes data to the capability. reg_idx - index into PciConfiguration.registers. offset - PciConfiguration.registers is in unit of DWord, offset define byte offset in the DWord. data - The data to write.

fn set_cap_mapping(&mut self, mapping: PciCapMapping)

Used to pass the mmio region for the capability to the implementation. If any external events update the capability’s registers, then PciCapMapping.set_reg must be called to make the changes visible to the guest.

fn num_regs(&self) -> usize