Struct devices::pci::msi::MsiConfig

pub struct MsiConfig {
    is_64bit: bool,
    mask_cap: bool,
    ctrl: u16,
    address: u64,
    data: u16,
    vm_socket_irq: Tube,
    irqfd: Option<Event>,
    gsi: Option<u32>,
    device_id: u32,
    device_name: String,
}

Wrapper over MSI Capability Structure

Fields

is_64bit: bool

mask_cap: bool

ctrl: u16

address: u64

data: u16

vm_socket_irq: Tube

irqfd: Option<Event>

gsi: Option<u32>

device_id: u32

device_name: String

Implementations

impl MsiConfig

pub fn new( is_64bit: bool, mask_cap: bool, vm_socket_irq: Tube, device_id: u32, device_name: String ) -> Self

fn len(&self) -> u32

pub fn is_msi_reg(&self, offset: u32, index: u64, len: usize) -> bool

pub fn read_msi_capability(&self, offset: u32, data: u32) -> u32

pub fn write_msi_capability(&mut self, offset: u32, data: &[u8]) -> MsiStatus

pub fn is_msi_enabled(&self) -> bool

fn add_msi_route(&self)

fn allocate_one_msi(&mut self)

fn enable(&mut self)

pub fn get_irqfd(&self) -> Option<&Event>

pub fn destroy(&mut self)

pub fn get_msi_socket(&self) -> RawDescriptor

Return the raw descriptor of the MSI device socket

pub fn trigger(&self)

Trait Implementations

impl PciCapConfig for MsiConfig

fn read_mask(&self) -> &'static [u32]

Returns the read mask used by read_reg.

fn read_reg(&self, reg_idx: usize) -> u32

Reads a 32bit register from the capability. Only the bits set in the read mask will be used, while the rest of the bits will be taken from the PciConfiguration’s register data. reg_idx - index into the capability

fn write_reg( &mut self, reg_idx: usize, offset: u64, data: &[u8] ) -> Option<Box<dyn PciCapConfigWriteResult>>

Writes data to the capability. reg_idx - index into PciConfiguration.registers. offset - PciConfiguration.registers is in unit of DWord, offset define byte offset in the DWord. data - The data to write.

fn set_cap_mapping(&mut self, _mapping: PciCapMapping)

Used to pass the mmio region for the capability to the implementation. If any external events update the capability’s registers, then PciCapMapping.set_reg must be called to make the changes visible to the guest.

fn num_regs(&self) -> usize