A CpuId Entry contains supported feature information for the given processor.
This can be modified by the hypervisor to pass additional information to the guest kernel
about the hypervisor or vm. Information is returned in the eax, ebx, ecx and edx registers
by the cpu for a given function and index/subfunction (passed into the cpu via the eax and ecx
register respectively).
The LapicState represents the state of an x86 CPU’s Local APIC.
The Local APIC consists of 64 128-bit registers, but only the first 32-bits of each register
can be used, so this structure only stores the first 32-bits of each register.
The PitRWMode enum represents the access mode of a PIT channel.
Reads and writes to the Pit happen over Port-mapped I/O, which happens one byte at a time,
but the count values and latch values are two bytes. So the access mode controls which of the
two bytes will be read when.
The PitRWState enum represents the state of reading to or writing from a channel.
This is related to the PitRWMode, it mainly gives more detail about the state of the channel
with respect to PitRWMode::Both.