Trait devices::pci::pci_device::PciDevice

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pub trait PciDevice: Send + Suspendable {
Show 30 methods    // Required methods
    fn debug_label(&self) -> String;
    fn allocate_address(
        &mut self,
        resources: &mut SystemAllocator
    ) -> Result<PciAddress, Error>;
    fn keep_rds(&self) -> Vec<RawDescriptor>;
    fn get_bar_configuration(
        &self,
        bar_num: usize
    ) -> Option<PciBarConfiguration>;
    fn read_config_register(&self, reg_idx: usize) -> u32;
    fn write_config_register(
        &mut self,
        reg_idx: usize,
        offset: u64,
        data: &[u8]
    );
    fn read_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &mut [u8]);
    fn write_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &[u8]);

    // Provided methods
    fn preferred_address(&self) -> Option<PciAddress> { ... }
    fn preferred_irq(&self) -> PreferredIrq { ... }
    fn assign_irq(
        &mut self,
        _irq_evt: IrqLevelEvent,
        _pin: PciInterruptPin,
        _irq_num: u32
    ) { ... }
    fn allocate_io_bars(
        &mut self,
        _resources: &mut SystemAllocator
    ) -> Result<Vec<BarRange>, Error> { ... }
    fn allocate_device_bars(
        &mut self,
        _resources: &mut SystemAllocator
    ) -> Result<Vec<BarRange>, Error> { ... }
    fn register_device_capabilities(&mut self) -> Result<(), Error> { ... }
    fn get_vm_memory_client(&self) -> Option<&VmMemoryClient> { ... }
    fn setup_pci_config_mapping(
        &mut self,
        _shmem: &SharedMemory,
        _base: usize,
        _len: usize
    ) -> Result<bool, Error> { ... }
    fn read_virtual_config_register(&self, _reg_idx: usize) -> u32 { ... }
    fn write_virtual_config_register(&mut self, _reg_idx: usize, _value: u32) { ... }
    fn on_device_sandboxed(&mut self) { ... }
    fn generate_acpi(&mut self, sdts: Vec<SDT>) -> Option<Vec<SDT>> { ... }
    fn generate_acpi_methods(
        &mut self
    ) -> (Vec<u8>, Option<(u32, MemoryMapping)>) { ... }
    fn set_gpe(&mut self, _resources: &mut SystemAllocator) -> Option<u32> { ... }
    fn destroy_device(&mut self) { ... }
    fn get_removed_children_devices(&self) -> Vec<PciAddress> { ... }
    fn get_new_pci_bus(&self) -> Option<Arc<Mutex<PciBus>>> { ... }
    fn configure_bridge_window(
        &mut self,
        _resources: &mut SystemAllocator,
        _bar_ranges: &[BarRange]
    ) -> Result<Vec<BarRange>, Error> { ... }
    fn set_subordinate_bus(&mut self, _bus_no: u8) { ... }
    fn supports_iommu(&self) -> bool { ... }
    fn set_iommu(&mut self, _iommu: IpcMemoryMapper) -> Result<()> { ... }
    fn as_virtio_pci_device(&self) -> Option<&VirtioPciDevice> { ... }
}

Required Methods§

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fn debug_label(&self) -> String

Returns a label suitable for debug output.

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fn allocate_address( &mut self, resources: &mut SystemAllocator ) -> Result<PciAddress, Error>

Allocate and return an unique bus, device and function number for this device. May be called multiple times; on subsequent calls, the device should return the same address it returned from the first call.

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fn keep_rds(&self) -> Vec<RawDescriptor>

A vector of device-specific file descriptors that must be kept open after jailing. Must be called before the process is jailed.

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fn get_bar_configuration(&self, bar_num: usize) -> Option<PciBarConfiguration>

Returns the configuration of a base address register, if present.

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fn read_config_register(&self, reg_idx: usize) -> u32

Reads from a PCI configuration register.

reg_idx - PCI register index (in units of 4 bytes).

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fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8])

Writes to a PCI configuration register.

reg_idx - PCI register index (in units of 4 bytes).
offset - byte offset within 4-byte register.
data - The data to write.

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fn read_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &mut [u8])

Reads from a BAR region mapped in to the device.

bar_index - The index of the PCI BAR.
offset - The starting offset in bytes inside the BAR.
data - Filled with the data from offset.

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fn write_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &[u8])

Writes to a BAR region mapped in to the device.

bar_index - The index of the PCI BAR.
offset - The starting offset in bytes inside the BAR.
data - The data to write.

Provided Methods§

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fn preferred_address(&self) -> Option<PciAddress>

Preferred PCI address for this device, if any.

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fn preferred_irq(&self) -> PreferredIrq

Preferred IRQ for this device. The device may request a specific pin and IRQ number by returning a Fixed value. If a device does not support INTx# interrupts at all, it should return None. Otherwise, an appropriate IRQ will be allocated automatically. The device’s assign_irq function will be called with its assigned IRQ either way.

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fn assign_irq( &mut self, _irq_evt: IrqLevelEvent, _pin: PciInterruptPin, _irq_num: u32 )

Assign a legacy PCI IRQ to this device. The device may write to irq_evt to trigger an interrupt. When irq_resample_evt is signaled, the device should re-assert irq_evt if necessary.

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fn allocate_io_bars( &mut self, _resources: &mut SystemAllocator ) -> Result<Vec<BarRange>, Error>

Allocates the needed IO BAR space using the allocate function which takes a size and returns an address. Returns a Vec of BarRange{addr, size, prefetchable}.

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fn allocate_device_bars( &mut self, _resources: &mut SystemAllocator ) -> Result<Vec<BarRange>, Error>

Allocates the needed device BAR space. Returns a Vec of BarRange{addr, size, prefetchable}. Unlike MMIO BARs (see allocate_io_bars), device BARs are not expected to incur VM exits

these BARs represent normal memory.

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fn register_device_capabilities(&mut self) -> Result<(), Error>

Register any capabilties specified by the device.

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fn get_vm_memory_client(&self) -> Option<&VmMemoryClient>

Gets a reference to the API client for sending VmMemoryRequest. Any devices that uses ioevents must provide this.

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fn setup_pci_config_mapping( &mut self, _shmem: &SharedMemory, _base: usize, _len: usize ) -> Result<bool, Error>

Provides a memory region to back MMIO access to the configuration space. If the device can keep the memory region up to date, then it should return Ok(true), after which no more calls to read_config_register will be made. If support isn’t implemented, it should return Ok(false). Otherwise, it should return an error (a failure here is not treated as a fatal setup error).

The device must set the header type register (0x0E) before returning from this function, and must make no further modifications to it after returning. This is to allow the caller to manage the multi- function device bit without worrying about race conditions.