Expand description
This is the CoIOMMU backend implementation. CoIOMMU is a virtual device which provide fine-grained pinning for the VFIO pci-passthrough device so that hypervisor doesn’t need to pin the enter VM’s memory to improve the memory utilization. CoIOMMU doesn’t provide the intra-guest protection so it can only be used for the TRUSTED passthrough devices.
CoIOMMU is presented at KVM forum 2020: https://kvmforum2020.sched.com/event/eE2z/a-virtual-iommu-with-cooperative-dma-buffer-tracking-yu-zhang-intel
Also presented at usenix ATC20: https://www.usenix.org/conference/atc20/presentation/tian
Structs§
- CoIommu
Dev - CoIommu
Parameters - Holds the parameters for a coiommu device
- CoIommu
PinState 🔒 - CoIommu
Reg 🔒 - DTTIter 🔒
- PinPage
Info 🔒 - PinWorker 🔒
- Pinned
Page 🔒Info - Unpin
Worker 🔒
Enums§
- CoIommu
Unpin Policy - Holds the coiommu unpin policy
- Error 🔒
- Unpin
Result 🔒 - Unpin
Thread 🔒State
Constants§
- COIOMMU_
CMD_ 🔒ACTIVATE - COIOMMU_
CMD_ 🔒DEACTIVATE - COIOMMU_
CMD_ 🔒PARK_ UNPIN - COIOMMU_
CMD_ 🔒UNPARK_ UNPIN - COIOMMU_
MMIO_ 🔒BAR - COIOMMU_
MMIO_ 🔒BAR_ SIZE - COIOMMU_
NOTIFYMAP_ 🔒BAR - COIOMMU_
NOTIFYMAP_ 🔒SIZE - COIOMMU_
PT_ 🔒LEVEL_ MASK - COIOMMU_
PT_ 🔒LEVEL_ STRIDE - COIOMMU_
REVISION_ 🔒ID - COIOMMU_
TOPOLOGYMAP_ 🔒BAR - COIOMMU_
TOPOLOGYMAP_ 🔒SIZE - COIOMMU_
UPPER_ 🔒LEVEL_ MASK - COIOMMU_
UPPER_ 🔒LEVEL_ STRIDE - DTTE_
ACCESSED_ 🔒FLAG - DTTE_
PINNED_ 🔒FLAG - DTT_
ENTRY_ 🔒PFN_ SHIFT - DTT_
ENTRY_ 🔒PRESENT - PAGE_
SHIFT_ 🔒4K - PAGE_
SIZE_ 🔒4K - PCI_
DEVICE_ 🔒ID_ COIOMMU - PCI_
VENDOR_ 🔒ID_ COIOMMU - PIN_
PAGES_ 🔒IN_ BATCH - UNPIN_
DEFAULT_ 🔒INTERVAL - UNPIN_
GEN_ 🔒DEFAULT_ THRES