pub struct Ac97Dev {
config_regs: PciConfiguration,
pci_address: Option<PciAddress>,
irq_evt: Option<IrqLevelEvent>,
bus_master: Ac97BusMaster,
mixer: Ac97Mixer,
backend: Ac97Backend,
}
Fields§
§config_regs: PciConfiguration
§pci_address: Option<PciAddress>
§irq_evt: Option<IrqLevelEvent>
§bus_master: Ac97BusMaster
§mixer: Ac97Mixer
§backend: Ac97Backend
Implementations§
source§impl Ac97Dev
impl Ac97Dev
pub(in pci::ac97) fn initialize_backend(
ac97_backend: &Ac97Backend,
mem: GuestMemory,
param: &Ac97Parameters
) -> Result<Self, Error>
fn create_cras_audio_device(
params: &Ac97Parameters,
mem: GuestMemory
) -> Result<Self, Error>
sourcepub fn minijail_policy(&self) -> &'static str
pub fn minijail_policy(&self) -> &'static str
Return the minijail policy file path for the current Ac97Dev.
source§impl Ac97Dev
impl Ac97Dev
sourcepub fn new(
mem: GuestMemory,
backend: Ac97Backend,
audio_server: Box<dyn ShmStreamSource<Error>>
) -> Self
pub fn new(
mem: GuestMemory,
backend: Ac97Backend,
audio_server: Box<dyn ShmStreamSource<Error>>
) -> Self
Creates an ‘Ac97Dev’ that uses the given GuestMemory
and starts with all registers at
default values.
sourcepub fn try_new(mem: GuestMemory, param: Ac97Parameters) -> Result<Self, Error>
pub fn try_new(mem: GuestMemory, param: Ac97Parameters) -> Result<Self, Error>
Creates an Ac97Dev
with suitable audio server inside based on Ac97Parameters. If it fails
to create Ac97Dev
with the given back-end, it’ll fallback to the null audio device.
fn create_null_audio_device(mem: GuestMemory) -> Self
fn read_mixer(&mut self, offset: u64, data: &mut [u8])
fn write_mixer(&mut self, offset: u64, data: &[u8])
fn read_bus_master(&mut self, offset: u64, data: &mut [u8])
fn write_bus_master(&mut self, offset: u64, data: &[u8])
Trait Implementations§
source§impl PciDevice for Ac97Dev
impl PciDevice for Ac97Dev
source§fn debug_label(&self) -> String
fn debug_label(&self) -> String
Returns a label suitable for debug output.
source§fn allocate_address(
&mut self,
resources: &mut SystemAllocator
) -> Result<PciAddress, Error>
fn allocate_address(
&mut self,
resources: &mut SystemAllocator
) -> Result<PciAddress, Error>
Allocate and return an unique bus, device and function number for this device.
May be called multiple times; on subsequent calls, the device should return the same
address it returned from the first call.
source§fn assign_irq(
&mut self,
irq_evt: IrqLevelEvent,
pin: PciInterruptPin,
irq_num: u32
)
fn assign_irq(
&mut self,
irq_evt: IrqLevelEvent,
pin: PciInterruptPin,
irq_num: u32
)
Assign a legacy PCI IRQ to this device.
The device may write to
irq_evt
to trigger an interrupt.
When irq_resample_evt
is signaled, the device should re-assert irq_evt
if necessary.source§fn allocate_io_bars(
&mut self,
resources: &mut SystemAllocator
) -> Result<Vec<BarRange>, Error>
fn allocate_io_bars(
&mut self,
resources: &mut SystemAllocator
) -> Result<Vec<BarRange>, Error>
Allocates the needed IO BAR space using the
allocate
function which takes a size and
returns an address. Returns a Vec of BarRange{addr, size, prefetchable}.source§fn get_bar_configuration(&self, bar_num: usize) -> Option<PciBarConfiguration>
fn get_bar_configuration(&self, bar_num: usize) -> Option<PciBarConfiguration>
Returns the configuration of a base address register, if present.
source§fn read_config_register(&self, reg_idx: usize) -> u32
fn read_config_register(&self, reg_idx: usize) -> u32
Reads from a PCI configuration register. Read more
source§fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8])
fn write_config_register(&mut self, reg_idx: usize, offset: u64, data: &[u8])
Writes to a PCI configuration register. Read more
source§fn keep_rds(&self) -> Vec<RawDescriptor> ⓘ
fn keep_rds(&self) -> Vec<RawDescriptor> ⓘ
A vector of device-specific file descriptors that must be kept open
after jailing. Must be called before the process is jailed.
source§fn read_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &mut [u8])
fn read_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &mut [u8])
Reads from a BAR region mapped in to the device. Read more
source§fn write_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &[u8])
fn write_bar(&mut self, bar_index: PciBarIndex, offset: u64, data: &[u8])
Writes to a BAR region mapped in to the device. Read more
source§fn preferred_address(&self) -> Option<PciAddress>
fn preferred_address(&self) -> Option<PciAddress>
Preferred PCI address for this device, if any.
source§fn preferred_irq(&self) -> PreferredIrq
fn preferred_irq(&self) -> PreferredIrq
Preferred IRQ for this device.
The device may request a specific pin and IRQ number by returning a
Fixed
value.
If a device does not support INTx# interrupts at all, it should return None
.
Otherwise, an appropriate IRQ will be allocated automatically.
The device’s assign_irq
function will be called with its assigned IRQ either way.source§fn allocate_device_bars(
&mut self,
_resources: &mut SystemAllocator
) -> Result<Vec<BarRange>, Error>
fn allocate_device_bars(
&mut self,
_resources: &mut SystemAllocator
) -> Result<Vec<BarRange>, Error>
Allocates the needed device BAR space. Returns a Vec of BarRange{addr, size, prefetchable}.
Unlike MMIO BARs (see allocate_io_bars), device BARs are not expected to incur VM exits Read more
source§fn register_device_capabilities(&mut self) -> Result<(), Error>
fn register_device_capabilities(&mut self) -> Result<(), Error>
Register any capabilties specified by the device.
source§fn get_vm_memory_client(&self) -> Option<&VmMemoryClient>
fn get_vm_memory_client(&self) -> Option<&VmMemoryClient>
Gets a reference to the API client for sending VmMemoryRequest. Any devices that uses ioevents
must provide this.
source§fn read_virtual_config_register(&self, _reg_idx: usize) -> u32
fn read_virtual_config_register(&self, _reg_idx: usize) -> u32
Reads from a virtual config register. Read more
source§fn write_virtual_config_register(&mut self, _reg_idx: usize, _value: u32)
fn write_virtual_config_register(&mut self, _reg_idx: usize, _value: u32)
Writes to a virtual config register. Read more
source§fn on_device_sandboxed(&mut self)
fn on_device_sandboxed(&mut self)
Invoked when the device is sandboxed.
fn generate_acpi(&mut self, sdts: Vec<SDT>) -> Option<Vec<SDT>>
source§fn generate_acpi_methods(&mut self) -> (Vec<u8>, Option<(u32, MemoryMapping)>)
fn generate_acpi_methods(&mut self) -> (Vec<u8>, Option<(u32, MemoryMapping)>)
Construct customized acpi method, and return the AML code and
shared memory
fn set_gpe(&mut self, _resources: &mut SystemAllocator) -> Option<u32>
source§fn destroy_device(&mut self)
fn destroy_device(&mut self)
Invoked when the device is destroyed
source§fn get_removed_children_devices(&self) -> Vec<PciAddress> ⓘ
fn get_removed_children_devices(&self) -> Vec<PciAddress> ⓘ
Get the removed children devices under pci bridge
source§fn get_new_pci_bus(&self) -> Option<Arc<Mutex<PciBus>>>
fn get_new_pci_bus(&self) -> Option<Arc<Mutex<PciBus>>>
Get the pci bus generated by this pci device
source§fn configure_bridge_window(
&mut self,
_resources: &mut SystemAllocator,
_bar_ranges: &[BarRange]
) -> Result<Vec<BarRange>, Error>
fn configure_bridge_window(
&mut self,
_resources: &mut SystemAllocator,
_bar_ranges: &[BarRange]
) -> Result<Vec<BarRange>, Error>
if device is a pci brdige, configure pci bridge window
source§fn set_subordinate_bus(&mut self, _bus_no: u8)
fn set_subordinate_bus(&mut self, _bus_no: u8)
if device is a pci bridge, configure subordinate bus number
source§fn supports_iommu(&self) -> bool
fn supports_iommu(&self) -> bool
Indicates whether the device supports IOMMU
Auto Trait Implementations§
impl !RefUnwindSafe for Ac97Dev
impl Send for Ac97Dev
impl !Sync for Ac97Dev
impl Unpin for Ac97Dev
impl !UnwindSafe for Ac97Dev
Blanket Implementations§
§impl<T> Downcast for Twhere
T: Any,
impl<T> Downcast for Twhere
T: Any,
§fn into_any(self: Box<T, Global>) -> Box<dyn Any + 'static, Global>
fn into_any(self: Box<T, Global>) -> Box<dyn Any + 'static, Global>
Convert
Box<dyn Trait>
(where Trait: Downcast
) to Box<dyn Any>
. Box<dyn Any>
can
then be further downcast
into Box<ConcreteType>
where ConcreteType
implements Trait
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fn into_any_rc(self: Rc<T>) -> Rc<dyn Any + 'static>
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Rc<Trait>
(where Trait: Downcast
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fn as_any(&self) -> &(dyn Any + 'static)
Convert
&Trait
(where Trait: Downcast
) to &Any
. This is needed since Rust cannot
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