Memory Layout
x86-64 guest physical memory map
This is a survey of the existing memory layout for crosvm on x86-64 when booting a Linux kernel. Some of these values are different when booting a BIOS image; see the source. All addresses are in hexadecimal.
Name/source link | Address | End (exclusive) | Size | Notes |
---|---|---|---|---|
START_OF_RAM_32BITS | 0000 | RAM | ||
ZERO_PAGE_OFFSET | 7000 | Linux boot_params structure | ||
BOOT_STACK_POINTER | 8000 | Boot SP value | ||
boot_pml4_addr | 9000 | A000 | 4 KiB | Boot page table |
boot_pdpte_addr | A000 | B000 | 4 KiB | Boot page table |
boot_pde_addr | B000 | F000 | 16 KiB | Boot page tables |
CMDLINE_OFFSET | 2_0000 | 2_0800 | 2 KiB | Linux kernel command line |
SETUP_DATA_START | 2_0800 | E_0000 | 766 KiB | Linux kernel setup_data linked list |
ACPI_HI_RSDP_WINDOW_BASE | E_0000 | ACPI tables | ||
KERNEL_START_OFFSET | 20_0000 | Linux kernel image load address | ||
initrd_start | after kernel | Initial RAM disk for Linux kernel (optional) | ||
END_ADDR_BEFORE_32BITS | after initrd | D000_0000 | ~3.24 GiB | RAM (<4G) |
PROTECTED_VM_FW_START | CFC0_0000 | D000_0000 | 4 MiB | pVM firmware (if running a protected VM) |
END_ADDR_BEFORE_32BITS | D000_0000 | F400_0000 | 576 MiB | Low (<4G) MMIO allocation area |
PCIE_CFG_MMIO_START | F400_0000 | F800_0000 | 64 MiB | PCIe enhanced config (ECAM) |
RESERVED_MEM_SIZE | F800_0000 | 1_0000_0000 | 128 MiB | LAPIC/IOAPIC/HPET/… |
IDENTITY_MAP_ADDR | FEFF_C000 | Identity map segment | ||
TSS_ADDR | FEFF_D000 | Boot task state segment | ||
1_0000_0000 | RAM (>4G) | |||
(end of RAM) | High (>4G) MMIO allocation area |
aarch64 guest physical memory map
All addresses are IPA in hexadecimal.
Common layout
These apply for all boot modes.
Name/source link | Address | End (exclusive) | Size | Notes |
---|---|---|---|---|
SERIAL_ADDR[3] | 2e8 | 2f0 | 8 bytes | Serial port MMIO |
SERIAL_ADDR[1] | 2f8 | 300 | 8 bytes | Serial port MMIO |
SERIAL_ADDR[2] | 3e8 | 3f0 | 8 bytes | Serial port MMIO |
SERIAL_ADDR[0] | 3f8 | 400 | 8 bytes | Serial port MMIO |
AARCH64_RTC_ADDR | 2000 | 3000 | 4 KiB | Real-time clock |
AARCH64_VMWDT_ADDR | 3000 | 4000 | 4 KiB | Watchdog device |
AARCH64_PCI_CAM_BASE_DEFAULT | 1_0000 | 101_0000 | 16 MiB | PCI configuration (CAM) |
AARCH64_VIRTFREQ_BASE | 104_0000 | 105_0000 | 64 KiB | Virtual cpufreq device |
AARCH64_PVTIME_IPA_START | 1ff_0000 | 200_0000 | 64 KiB | Paravirtualized time |
AARCH64_PCI_MEM_BASE_DEFAULT | 200_0000 | 400_0000 | 32 MiB | Low MMIO allocation area |
AARCH64_GIC_CPUI_BASE | 3ffd_0000 | 3fff_0000 | 128 KiB | vGIC |
AARCH64_GIC_DIST_BASE | 3fff_0000 | 4000_0000 | 64 KiB | vGIC |
AARCH64_PROTECTED_VM_FW_START | 7fc0_0000 | 8000_0000 | 4 MiB | pVM firmware (if running a protected VM) |
AARCH64_PHYS_MEM_START | 8000_0000 | --mem size | RAM (starts at IPA = 2 GiB) | |
plat_mmio_base | after RAM | +0x800000 | 8 MiB | Platform device MMIO region |
high_mmio_base | after plat_mmio | max phys addr | High MMIO allocation area |
RAM Layout
The RAM layout depends on the --fdt-position
setting, which defaults to
start
when load using --bios
and to end
when using --kernel
.
In --kernel
mode, the initrd is always loaded immediately after the kernel,
with a 16 MiB alignment.
--fdt-position=start
Name/source link | Address | End (exclusive) | Size | Notes |
---|---|---|---|---|
fdt_address | 8000_0000 | 8020_0000 | 2 MiB | Flattened device tree in RAM |
payload_address | 8020_0000 | Kernel/BIOS load location in RAM |
--fdt-position=after-payload
Name/source link | Address | End (exclusive) | Size | Notes |
---|---|---|---|---|
payload_address | 8000_0000 | Kernel/BIOS load location in RAM | ||
fdt_address | after payload (2 MiB alignment) | 2 MiB | Flattened device tree in RAM |
--fdt-position=end
Name/source link | Address | End (exclusive) | Size | Notes |
---|---|---|---|---|
payload_address | 8000_0000 | Kernel/BIOS load location in RAM | ||
fdt_address | before end of RAM (2 MiB alignment) | 2 MiB | Flattened device tree in RAM |