Memory Layout

x86-64 guest physical memory map

This is a survey of the existing memory layout for crosvm on x86-64 when booting a Linux kernel. Some of these values are different when booting a BIOS image; see the source. All addresses are in hexadecimal.

Name/source linkAddressEnd (exclusive)SizeNotes
START_OF_RAM_32BITS0000RAM
ZERO_PAGE_OFFSET7000Linux boot_params structure
BOOT_STACK_POINTER8000Boot SP value
boot_pml4_addr9000A0004 KiBBoot page table
boot_pdpte_addrA000B0004 KiBBoot page table
boot_pde_addrB000F00016 KiBBoot page tables
CMDLINE_OFFSET2_00002_08002 KiBLinux kernel command line
SETUP_DATA_START2_0800E_0000766 KiBLinux kernel setup_data linked list
ACPI_HI_RSDP_WINDOW_BASEE_0000ACPI tables
KERNEL_START_OFFSET20_0000Linux kernel image load address
initrd_startafter kernelInitial RAM disk for Linux kernel (optional)
END_ADDR_BEFORE_32BITSafter initrdD000_0000~3.24 GiBRAM (<4G)
PROTECTED_VM_FW_STARTCFC0_0000D000_00004 MiBpVM firmware (if running a protected VM)
END_ADDR_BEFORE_32BITSD000_0000F400_0000576 MiBLow (<4G) MMIO allocation area
PCIE_CFG_MMIO_STARTF400_0000F800_000064 MiBPCIe enhanced config (ECAM)
RESERVED_MEM_SIZEF800_00001_0000_0000128 MiBLAPIC/IOAPIC/HPET/…
IDENTITY_MAP_ADDRFEFF_C000Identity map segment
TSS_ADDRFEFF_D000Boot task state segment
1_0000_0000RAM (>4G)
(end of RAM)High (>4G) MMIO allocation area

aarch64 guest physical memory map

All addresses are IPA in hexadecimal.

Common layout

These apply for all boot modes.

Name/source linkAddressEnd (exclusive)SizeNotes
SERIAL_ADDR[3]2e82f08 bytesSerial port MMIO
SERIAL_ADDR[1]2f83008 bytesSerial port MMIO
SERIAL_ADDR[2]3e83f08 bytesSerial port MMIO
SERIAL_ADDR[0]3f84008 bytesSerial port MMIO
AARCH64_RTC_ADDR200030004 KiBReal-time clock
AARCH64_VMWDT_ADDR300040004 KiBWatchdog device
AARCH64_PCI_CAM_BASE_DEFAULT1_0000101_000016 MiBPCI configuration (CAM)
AARCH64_VIRTFREQ_BASE104_0000105_000064 KiBVirtual cpufreq device
AARCH64_PVTIME_IPA_START1ff_0000200_000064 KiBParavirtualized time
AARCH64_PCI_MEM_BASE_DEFAULT200_0000400_000032 MiBLow MMIO allocation area
AARCH64_GIC_CPUI_BASE3ffd_00003fff_0000128 KiBvGIC
AARCH64_GIC_DIST_BASE3fff_00004000_000064 KiBvGIC
AARCH64_PROTECTED_VM_FW_START7fc0_00008000_00004 MiBpVM firmware (if running a protected VM)
AARCH64_PHYS_MEM_START8000_0000--mem sizeRAM (starts at IPA = 2 GiB)
plat_mmio_baseafter RAM+0x8000008 MiBPlatform device MMIO region
high_mmio_baseafter plat_mmiomax phys addrHigh MMIO allocation area

RAM Layout

The RAM layout depends on the --fdt-position setting, which defaults to start when load using --bios and to end when using --kernel.

In --kernel mode, the initrd is always loaded immediately after the kernel, with a 16 MiB alignment.

--fdt-position=start

Name/source linkAddressEnd (exclusive)SizeNotes
fdt_address8000_00008020_00002 MiBFlattened device tree in RAM
payload_address8020_0000Kernel/BIOS load location in RAM

--fdt-position=after-payload

Name/source linkAddressEnd (exclusive)SizeNotes
payload_address8000_0000Kernel/BIOS load location in RAM
fdt_addressafter payload (2 MiB alignment)2 MiBFlattened device tree in RAM

--fdt-position=end

Name/source linkAddressEnd (exclusive)SizeNotes
payload_address8000_0000Kernel/BIOS load location in RAM
fdt_addressbefore end of RAM (2 MiB alignment)2 MiBFlattened device tree in RAM