devices/irqchip/kvm/
mod.rs1use base::error;
6use base::Error;
7use base::Event;
8use base::Result;
9#[cfg(target_arch = "x86_64")]
10use hypervisor::kvm::KvmCap;
11use hypervisor::kvm::KvmVcpu;
12use hypervisor::IrqRoute;
13use hypervisor::MPState;
14use hypervisor::Vcpu;
15use kvm_sys::kvm_mp_state;
16use resources::SystemAllocator;
17
18use crate::Bus;
19use crate::IrqEdgeEvent;
20use crate::IrqEventSource;
21use crate::IrqLevelEvent;
22
23#[cfg(target_arch = "x86_64")]
24mod x86_64;
25#[cfg(target_arch = "x86_64")]
26pub use x86_64::*;
27
28#[cfg(target_arch = "aarch64")]
29mod aarch64;
30#[cfg(target_arch = "aarch64")]
31pub use aarch64::*;
32
33#[cfg(target_arch = "riscv64")]
34mod riscv64;
35#[cfg(target_arch = "riscv64")]
36pub use riscv64::*;
37
38use crate::IrqChip;
39use crate::IrqChipCap;
40use crate::IrqEventIndex;
41use crate::VcpuRunState;
42
43impl IrqChip for KvmKernelIrqChip {
45 fn add_vcpu(&mut self, vcpu_id: usize, vcpu: &dyn Vcpu) -> Result<()> {
47 let vcpu: &KvmVcpu = vcpu
48 .downcast_ref()
49 .expect("KvmKernelIrqChip::add_vcpu called with non-KvmVcpu");
50 self.vcpus.lock()[vcpu_id] = Some(vcpu.try_clone()?);
51 Ok(())
52 }
53
54 fn register_edge_irq_event(
57 &mut self,
58 irq: u32,
59 irq_event: &IrqEdgeEvent,
60 _source: IrqEventSource,
61 ) -> Result<Option<IrqEventIndex>> {
62 self.vm.register_irqfd(irq, irq_event.get_trigger(), None)?;
63 Ok(None)
64 }
65
66 fn unregister_edge_irq_event(&mut self, irq: u32, irq_event: &IrqEdgeEvent) -> Result<()> {
68 self.vm.unregister_irqfd(irq, irq_event.get_trigger())
69 }
70
71 fn register_level_irq_event(
74 &mut self,
75 irq: u32,
76 irq_event: &IrqLevelEvent,
77 _source: IrqEventSource,
78 ) -> Result<Option<IrqEventIndex>> {
79 self.vm
80 .register_irqfd(irq, irq_event.get_trigger(), Some(irq_event.get_resample()))?;
81 Ok(None)
82 }
83
84 fn unregister_level_irq_event(&mut self, irq: u32, irq_event: &IrqLevelEvent) -> Result<()> {
86 self.vm.unregister_irqfd(irq, irq_event.get_trigger())
87 }
88
89 fn route_irq(&mut self, route: IrqRoute) -> Result<()> {
91 let mut routes = self.routes.lock();
92 routes.retain(|r| r.gsi != route.gsi);
93
94 routes.push(route);
95
96 self.vm.set_gsi_routing(&routes)
97 }
98
99 fn set_irq_routes(&mut self, routes: &[IrqRoute]) -> Result<()> {
101 let mut current_routes = self.routes.lock();
102 *current_routes = routes.to_vec();
103
104 self.vm.set_gsi_routing(¤t_routes)
105 }
106
107 fn irq_event_tokens(&self) -> Result<Vec<(IrqEventIndex, IrqEventSource, Event)>> {
112 Ok(Vec::new())
113 }
114
115 fn service_irq(&mut self, irq: u32, level: bool) -> Result<()> {
119 self.vm.set_irq_line(irq, level)
120 }
121
122 fn service_irq_event(&mut self, _event_index: IrqEventIndex) -> Result<()> {
128 error!("service_irq_event should never be called for KvmKernelIrqChip");
129 Ok(())
130 }
131
132 fn broadcast_eoi(&self, _vector: u8) -> Result<()> {
136 error!("broadcast_eoi should never be called for KvmKernelIrqChip");
137 Ok(())
138 }
139
140 fn inject_interrupts(&self, _vcpu: &dyn Vcpu) -> Result<()> {
144 Ok(())
145 }
146
147 fn halted(&self, _vcpu_id: usize) {}
150
151 fn wait_until_runnable(&self, _vcpu: &dyn Vcpu) -> Result<VcpuRunState> {
157 Ok(VcpuRunState::Runnable)
158 }
159
160 fn kick_halted_vcpus(&self) {}
163
164 fn get_mp_state(&self, vcpu_id: usize) -> Result<MPState> {
166 match self.vcpus.lock().get(vcpu_id) {
167 Some(Some(vcpu)) => Ok(MPState::from(&vcpu.get_mp_state()?)),
168 _ => Err(Error::new(libc::ENOENT)),
169 }
170 }
171
172 fn set_mp_state(&mut self, vcpu_id: usize, state: &MPState) -> Result<()> {
174 match self.vcpus.lock().get(vcpu_id) {
175 Some(Some(vcpu)) => vcpu.set_mp_state(&kvm_mp_state::from(state)),
176 _ => Err(Error::new(libc::ENOENT)),
177 }
178 }
179
180 fn try_clone(&self) -> Result<Self> {
182 self.arch_try_clone()
185 }
186
187 fn finalize_devices(
191 &mut self,
192 _resources: &mut SystemAllocator,
193 _io_bus: &Bus,
194 _mmio_bus: &Bus,
195 ) -> Result<()> {
196 Ok(())
197 }
198
199 fn process_delayed_irq_events(&mut self) -> Result<()> {
201 Ok(())
202 }
203
204 fn irq_delayed_event_token(&self) -> Result<Option<Event>> {
205 Ok(None)
206 }
207
208 fn check_capability(&self, c: IrqChipCap) -> bool {
209 match c {
210 #[cfg(target_arch = "x86_64")]
211 IrqChipCap::TscDeadlineTimer => self.vm.check_raw_capability(KvmCap::TscDeadlineTimer),
212 #[cfg(target_arch = "x86_64")]
213 IrqChipCap::X2Apic => true,
214 IrqChipCap::MpStateGetSet => true,
215 }
216 }
217}